[llvm] [PowerPC] Spill non-volatile registers required for traceback table (PR #71115)
Maryam Moghadas via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 22 08:16:00 PST 2024
================
@@ -2741,6 +2743,66 @@ bool PPCFrameLowering::enableShrinkWrapping(const MachineFunction &MF) const {
return !MF.getSubtarget<PPCSubtarget>().is32BitELFABI();
}
+static bool isGPR(MCPhysReg Reg) { return Reg >= PPC::R0 && Reg <= PPC::R31; }
+static bool isG8R(MCPhysReg Reg) { return Reg >= PPC::X0 && Reg <= PPC::X31; }
+static bool isFPR(MCPhysReg Reg) { return Reg >= PPC::F0 && Reg <= PPC::F31; }
+static bool isVR(MCPhysReg Reg) { return Reg >= PPC::V0 && Reg <= PPC::V31; }
+
+void PPCFrameLowering::updateCalleeSaves(const MachineFunction &MF,
+ BitVector &SavedRegs) const {
+ // The AIX ABI uses traceback tables for EH which require that if callee-saved
+ // register N is used, all registers N-31 must be saved/restored.
+ // NOTE: The check for AIX is not actually what is relevant. Traceback tables
+ // on Linux have the same requirements. It is just that AIX is the only ABI
+ // for which we actually use traceback tables. If another ABI needs to be
+ // supported that also uses them, we can add a check such as
+ // Subtarget.usesTraceBackTables().
+ assert(Subtarget.isAIXABI() && "function only called for AIX");
+
+ // If there are no callee saves then there is nothing to do.
+ if (SavedRegs.none())
+ return;
+
+ const PPCRegisterInfo *RegInfo = Subtarget.getRegisterInfo();
+ const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(&MF);
+ MCPhysReg LowestGPR = PPC::R31;
+ MCPhysReg LowestG8R = PPC::X31;
+ MCPhysReg LowestFPR = PPC::F31;
+ MCPhysReg LowestVR = PPC::V31;
+
+ // Traverse the CSR's twice so as not to rely on ascending ordering of
+ // registers in the array. The first pass finds the lowest numbered
+ // register and the second pass marks all higher numbered registers
+ // for spilling.
+ for (int i = 0; CSRegs[i]; i++) {
+ // Get the lowest numbered register for each class that actually needs
+ // to be saved.
+ MCPhysReg Cand = CSRegs[i];
----------------
maryammo wrote:
I used this kind of checks `PPC::GPRCRegClass.contains(Cand)` to be consistent with other usage.
https://github.com/llvm/llvm-project/pull/71115
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