[llvm] d3cd1ce - [X86] Add lowering tests for promoted CMPCCXADD and update CC representation (#78685)
via llvm-commits
llvm-commits at lists.llvm.org
Sun Jan 21 19:32:06 PST 2024
Author: XinWang10
Date: 2024-01-22T11:32:03+08:00
New Revision: d3cd1ce6ab13ae6be7842e2d905c5f3c783d3f04
URL: https://github.com/llvm/llvm-project/commit/d3cd1ce6ab13ae6be7842e2d905c5f3c783d3f04
DIFF: https://github.com/llvm/llvm-project/commit/d3cd1ce6ab13ae6be7842e2d905c5f3c783d3f04.diff
LOG: [X86] Add lowering tests for promoted CMPCCXADD and update CC representation (#78685)
https://github.com/llvm/llvm-project/pull/76125 supported the enc/dec
for CMPCCXADD instructions, this patch
1. Add lowering test for promoted CMPCCXADD
2. Update the representation of condition code for promoted CMPCCXADD to
align with the existing one
Added:
Modified:
llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
llvm/test/CodeGen/X86/cmpccxadd-intrinsics.ll
llvm/test/MC/Disassembler/X86/apx/cmpccxadd.txt
llvm/test/MC/X86/apx/cmpccxadd-att.s
llvm/test/MC/X86/apx/cmpccxadd-intel.s
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
index 1947313a9dfb0b..e519c00a21109a 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
@@ -30,7 +30,9 @@ void X86InstPrinterCommon::printCondCode(const MCInst *MI, unsigned Op,
raw_ostream &O) {
int64_t Imm = MI->getOperand(Op).getImm();
bool Flavor = MI->getOpcode() == X86::CMPCCXADDmr32 ||
- MI->getOpcode() == X86::CMPCCXADDmr64;
+ MI->getOpcode() == X86::CMPCCXADDmr64 ||
+ MI->getOpcode() == X86::CMPCCXADDmr32_EVEX ||
+ MI->getOpcode() == X86::CMPCCXADDmr64_EVEX;
switch (Imm) {
default: llvm_unreachable("Invalid condcode argument!");
case 0: O << "o"; break;
diff --git a/llvm/test/CodeGen/X86/cmpccxadd-intrinsics.ll b/llvm/test/CodeGen/X86/cmpccxadd-intrinsics.ll
index b888fb5b1ff694..f88216f95a7614 100644
--- a/llvm/test/CodeGen/X86/cmpccxadd-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/cmpccxadd-intrinsics.ll
@@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+cmpccxadd | FileCheck %s
+; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+cmpccxadd,+egpr | FileCheck %s --check-prefix=EGPR
define dso_local i32 @test_cmpbexadd32(ptr %__A, i32 %__B, i32 %__C) nounwind {
; CHECK-LABEL: test_cmpbexadd32:
@@ -7,6 +8,12 @@ define dso_local i32 @test_cmpbexadd32(ptr %__A, i32 %__B, i32 %__C) nounwind {
; CHECK-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
; CHECK-NEXT: cmpoxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe0,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmpbexadd32:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
+; EGPR-NEXT: cmpoxadd %edx, %eax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x69,0xe0,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i32 @llvm.x86.cmpccxadd32(ptr %__A, i32 %__B, i32 %__C, i32 0)
ret i32 %0
@@ -20,6 +27,12 @@ define dso_local i64 @test_cmpbexadd64(ptr %__A, i64 %__B, i64 %__C) nounwind {
; CHECK-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
; CHECK-NEXT: cmpoxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe0,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmpbexadd64:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; EGPR-NEXT: cmpoxadd %rdx, %rax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe9,0xe0,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i64 @llvm.x86.cmpccxadd64(ptr %__A, i64 %__B, i64 %__C, i32 0)
ret i64 %0
@@ -33,6 +46,12 @@ define dso_local i32 @test_cmpbxadd32(ptr %__A, i32 %__B, i32 %__C) nounwind {
; CHECK-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
; CHECK-NEXT: cmpnoxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe1,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmpbxadd32:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
+; EGPR-NEXT: cmpnoxadd %edx, %eax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x69,0xe1,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i32 @llvm.x86.cmpccxadd32(ptr %__A, i32 %__B, i32 %__C, i32 1)
ret i32 %0
@@ -44,6 +63,12 @@ define dso_local i64 @test_cmpbxadd64(ptr %__A, i64 %__B, i64 %__C) nounwind {
; CHECK-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
; CHECK-NEXT: cmpnoxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe1,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmpbxadd64:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; EGPR-NEXT: cmpnoxadd %rdx, %rax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe9,0xe1,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i64 @llvm.x86.cmpccxadd64(ptr %__A, i64 %__B, i64 %__C, i32 1)
ret i64 %0
@@ -55,6 +80,12 @@ define dso_local i32 @test_cmplexadd32(ptr %__A, i32 %__B, i32 %__C) nounwind {
; CHECK-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
; CHECK-NEXT: cmpbxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe2,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmplexadd32:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
+; EGPR-NEXT: cmpbxadd %edx, %eax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x69,0xe2,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i32 @llvm.x86.cmpccxadd32(ptr %__A, i32 %__B, i32 %__C, i32 2)
ret i32 %0
@@ -66,6 +97,12 @@ define dso_local i64 @test_cmplexadd64(ptr %__A, i64 %__B, i64 %__C) nounwind {
; CHECK-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
; CHECK-NEXT: cmpbxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe2,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmplexadd64:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; EGPR-NEXT: cmpbxadd %rdx, %rax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe9,0xe2,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i64 @llvm.x86.cmpccxadd64(ptr %__A, i64 %__B, i64 %__C, i32 2)
ret i64 %0
@@ -77,6 +114,12 @@ define dso_local i32 @test_cmplxadd32(ptr %__A, i32 %__B, i32 %__C) nounwind {
; CHECK-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
; CHECK-NEXT: cmpnbxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe3,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmplxadd32:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
+; EGPR-NEXT: cmpnbxadd %edx, %eax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x69,0xe3,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i32 @llvm.x86.cmpccxadd32(ptr %__A, i32 %__B, i32 %__C, i32 3)
ret i32 %0
@@ -88,6 +131,12 @@ define dso_local i64 @test_cmplxadd64(ptr %__A, i64 %__B, i64 %__C) nounwind {
; CHECK-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
; CHECK-NEXT: cmpnbxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe3,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmplxadd64:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; EGPR-NEXT: cmpnbxadd %rdx, %rax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe9,0xe3,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i64 @llvm.x86.cmpccxadd64(ptr %__A, i64 %__B, i64 %__C, i32 3)
ret i64 %0
@@ -99,6 +148,12 @@ define dso_local i32 @test_cmpnbexadd32(ptr %__A, i32 %__B, i32 %__C) nounwind {
; CHECK-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
; CHECK-NEXT: cmpzxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe4,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmpnbexadd32:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
+; EGPR-NEXT: cmpzxadd %edx, %eax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x69,0xe4,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i32 @llvm.x86.cmpccxadd32(ptr %__A, i32 %__B, i32 %__C, i32 4)
ret i32 %0
@@ -110,6 +165,12 @@ define dso_local i64 @test_cmpnbexadd64(ptr %__A, i64 %__B, i64 %__C) nounwind {
; CHECK-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
; CHECK-NEXT: cmpzxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe4,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmpnbexadd64:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; EGPR-NEXT: cmpzxadd %rdx, %rax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe9,0xe4,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i64 @llvm.x86.cmpccxadd64(ptr %__A, i64 %__B, i64 %__C, i32 4)
ret i64 %0
@@ -121,6 +182,12 @@ define dso_local i32 @test_cmpnbxadd32(ptr %__A, i32 %__B, i32 %__C) nounwind {
; CHECK-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
; CHECK-NEXT: cmpnzxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe5,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmpnbxadd32:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
+; EGPR-NEXT: cmpnzxadd %edx, %eax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x69,0xe5,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i32 @llvm.x86.cmpccxadd32(ptr %__A, i32 %__B, i32 %__C, i32 5)
ret i32 %0
@@ -132,6 +199,12 @@ define dso_local i64 @test_cmpnbxadd64(ptr %__A, i64 %__B, i64 %__C) nounwind {
; CHECK-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
; CHECK-NEXT: cmpnzxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe5,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmpnbxadd64:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; EGPR-NEXT: cmpnzxadd %rdx, %rax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe9,0xe5,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i64 @llvm.x86.cmpccxadd64(ptr %__A, i64 %__B, i64 %__C, i32 5)
ret i64 %0
@@ -143,6 +216,12 @@ define dso_local i32 @test_cmpnlexadd32(ptr %__A, i32 %__B, i32 %__C) nounwind {
; CHECK-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
; CHECK-NEXT: cmpbexadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe6,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmpnlexadd32:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
+; EGPR-NEXT: cmpbexadd %edx, %eax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x69,0xe6,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i32 @llvm.x86.cmpccxadd32(ptr %__A, i32 %__B, i32 %__C, i32 6)
ret i32 %0
@@ -154,6 +233,12 @@ define dso_local i64 @test_cmpnlexadd64(ptr %__A, i64 %__B, i64 %__C) nounwind {
; CHECK-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
; CHECK-NEXT: cmpbexadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe6,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmpnlexadd64:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; EGPR-NEXT: cmpbexadd %rdx, %rax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe9,0xe6,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i64 @llvm.x86.cmpccxadd64(ptr %__A, i64 %__B, i64 %__C, i32 6)
ret i64 %0
@@ -165,6 +250,12 @@ define dso_local i32 @test_cmpnlxadd32(ptr %__A, i32 %__B, i32 %__C) nounwind {
; CHECK-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
; CHECK-NEXT: cmpnbexadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe7,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmpnlxadd32:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
+; EGPR-NEXT: cmpnbexadd %edx, %eax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x69,0xe7,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i32 @llvm.x86.cmpccxadd32(ptr %__A, i32 %__B, i32 %__C, i32 7)
ret i32 %0
@@ -176,6 +267,12 @@ define dso_local i64 @test_cmpnlxadd64(ptr %__A, i64 %__B, i64 %__C) nounwind {
; CHECK-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
; CHECK-NEXT: cmpnbexadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe7,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmpnlxadd64:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; EGPR-NEXT: cmpnbexadd %rdx, %rax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe9,0xe7,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i64 @llvm.x86.cmpccxadd64(ptr %__A, i64 %__B, i64 %__C, i32 7)
ret i64 %0
@@ -187,6 +284,12 @@ define dso_local i32 @test_cmpnoxadd32(ptr %__A, i32 %__B, i32 %__C) nounwind {
; CHECK-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
; CHECK-NEXT: cmpsxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe8,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmpnoxadd32:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
+; EGPR-NEXT: cmpsxadd %edx, %eax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x69,0xe8,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i32 @llvm.x86.cmpccxadd32(ptr %__A, i32 %__B, i32 %__C, i32 8)
ret i32 %0
@@ -198,6 +301,12 @@ define dso_local i64 @test_cmpnoxadd64(ptr %__A, i64 %__B, i64 %__C) nounwind {
; CHECK-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
; CHECK-NEXT: cmpsxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe8,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmpnoxadd64:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; EGPR-NEXT: cmpsxadd %rdx, %rax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe9,0xe8,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i64 @llvm.x86.cmpccxadd64(ptr %__A, i64 %__B, i64 %__C, i32 8)
ret i64 %0
@@ -209,6 +318,12 @@ define dso_local i32 @test_cmpnpxadd32(ptr %__A, i32 %__B, i32 %__C) nounwind {
; CHECK-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
; CHECK-NEXT: cmpnsxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xe9,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmpnpxadd32:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
+; EGPR-NEXT: cmpnsxadd %edx, %eax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x69,0xe9,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i32 @llvm.x86.cmpccxadd32(ptr %__A, i32 %__B, i32 %__C, i32 9)
ret i32 %0
@@ -220,6 +335,12 @@ define dso_local i64 @test_cmpnpxadd64(ptr %__A, i64 %__B, i64 %__C) nounwind {
; CHECK-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
; CHECK-NEXT: cmpnsxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xe9,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmpnpxadd64:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; EGPR-NEXT: cmpnsxadd %rdx, %rax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe9,0xe9,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i64 @llvm.x86.cmpccxadd64(ptr %__A, i64 %__B, i64 %__C, i32 9)
ret i64 %0
@@ -231,6 +352,12 @@ define dso_local i32 @test_cmpnsxadd32(ptr %__A, i32 %__B, i32 %__C) nounwind {
; CHECK-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
; CHECK-NEXT: cmppxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xea,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmpnsxadd32:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
+; EGPR-NEXT: cmppxadd %edx, %eax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x69,0xea,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i32 @llvm.x86.cmpccxadd32(ptr %__A, i32 %__B, i32 %__C, i32 10)
ret i32 %0
@@ -242,6 +369,12 @@ define dso_local i64 @test_cmpnsxadd64(ptr %__A, i64 %__B, i64 %__C) nounwind {
; CHECK-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
; CHECK-NEXT: cmppxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xea,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmpnsxadd64:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; EGPR-NEXT: cmppxadd %rdx, %rax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe9,0xea,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i64 @llvm.x86.cmpccxadd64(ptr %__A, i64 %__B, i64 %__C, i32 10)
ret i64 %0
@@ -253,6 +386,12 @@ define dso_local i32 @test_cmpnzxadd32(ptr %__A, i32 %__B, i32 %__C) nounwind {
; CHECK-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
; CHECK-NEXT: cmpnpxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xeb,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmpnzxadd32:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
+; EGPR-NEXT: cmpnpxadd %edx, %eax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x69,0xeb,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i32 @llvm.x86.cmpccxadd32(ptr %__A, i32 %__B, i32 %__C, i32 11)
ret i32 %0
@@ -264,6 +403,12 @@ define dso_local i64 @test_cmpnzxadd64(ptr %__A, i64 %__B, i64 %__C) nounwind {
; CHECK-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
; CHECK-NEXT: cmpnpxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xeb,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmpnzxadd64:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; EGPR-NEXT: cmpnpxadd %rdx, %rax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe9,0xeb,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i64 @llvm.x86.cmpccxadd64(ptr %__A, i64 %__B, i64 %__C, i32 11)
ret i64 %0
@@ -275,6 +420,12 @@ define dso_local i32 @test_cmpoxadd32(ptr %__A, i32 %__B, i32 %__C) nounwind {
; CHECK-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
; CHECK-NEXT: cmplxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xec,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmpoxadd32:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
+; EGPR-NEXT: cmplxadd %edx, %eax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x69,0xec,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i32 @llvm.x86.cmpccxadd32(ptr %__A, i32 %__B, i32 %__C, i32 12)
ret i32 %0
@@ -286,6 +437,12 @@ define dso_local i64 @test_cmpoxadd64(ptr %__A, i64 %__B, i64 %__C) nounwind {
; CHECK-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
; CHECK-NEXT: cmplxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xec,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmpoxadd64:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; EGPR-NEXT: cmplxadd %rdx, %rax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe9,0xec,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i64 @llvm.x86.cmpccxadd64(ptr %__A, i64 %__B, i64 %__C, i32 12)
ret i64 %0
@@ -297,6 +454,12 @@ define dso_local i32 @test_cmppxadd32(ptr %__A, i32 %__B, i32 %__C) nounwind {
; CHECK-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
; CHECK-NEXT: cmpnlxadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xed,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmppxadd32:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
+; EGPR-NEXT: cmpnlxadd %edx, %eax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x69,0xed,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i32 @llvm.x86.cmpccxadd32(ptr %__A, i32 %__B, i32 %__C, i32 13)
ret i32 %0
@@ -308,6 +471,12 @@ define dso_local i64 @test_cmppxadd64(ptr %__A, i64 %__B, i64 %__C) nounwind {
; CHECK-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
; CHECK-NEXT: cmpnlxadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xed,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmppxadd64:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; EGPR-NEXT: cmpnlxadd %rdx, %rax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe9,0xed,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i64 @llvm.x86.cmpccxadd64(ptr %__A, i64 %__B, i64 %__C, i32 13)
ret i64 %0
@@ -319,6 +488,12 @@ define dso_local i32 @test_cmpsxadd32(ptr %__A, i32 %__B, i32 %__C) nounwind {
; CHECK-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
; CHECK-NEXT: cmplexadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xee,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmpsxadd32:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
+; EGPR-NEXT: cmplexadd %edx, %eax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x69,0xee,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i32 @llvm.x86.cmpccxadd32(ptr %__A, i32 %__B, i32 %__C, i32 14)
ret i32 %0
@@ -330,6 +505,12 @@ define dso_local i64 @test_cmpsxadd64(ptr %__A, i64 %__B, i64 %__C) nounwind {
; CHECK-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
; CHECK-NEXT: cmplexadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xee,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmpsxadd64:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; EGPR-NEXT: cmplexadd %rdx, %rax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe9,0xee,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i64 @llvm.x86.cmpccxadd64(ptr %__A, i64 %__B, i64 %__C, i32 14)
ret i64 %0
@@ -341,6 +522,12 @@ define dso_local i32 @test_cmpzxadd32(ptr %__A, i32 %__B, i32 %__C) nounwind {
; CHECK-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
; CHECK-NEXT: cmpnlexadd %edx, %eax, (%rdi) # encoding: [0xc4,0xe2,0x69,0xef,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmpzxadd32:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movl %esi, %eax # encoding: [0x89,0xf0]
+; EGPR-NEXT: cmpnlexadd %edx, %eax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0x69,0xef,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i32 @llvm.x86.cmpccxadd32(ptr %__A, i32 %__B, i32 %__C, i32 15)
ret i32 %0
@@ -352,6 +539,12 @@ define dso_local i64 @test_cmpzxadd64(ptr %__A, i64 %__B, i64 %__C) nounwind {
; CHECK-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
; CHECK-NEXT: cmpnlexadd %rdx, %rax, (%rdi) # encoding: [0xc4,0xe2,0xe9,0xef,0x07]
; CHECK-NEXT: retq # encoding: [0xc3]
+;
+; EGPR-LABEL: test_cmpzxadd64:
+; EGPR: # %bb.0: # %entry
+; EGPR-NEXT: movq %rsi, %rax # encoding: [0x48,0x89,0xf0]
+; EGPR-NEXT: cmpnlexadd %rdx, %rax, (%rdi) # EVEX TO VEX Compression encoding: [0xc4,0xe2,0xe9,0xef,0x07]
+; EGPR-NEXT: retq # encoding: [0xc3]
entry:
%0 = tail call i64 @llvm.x86.cmpccxadd64(ptr %__A, i64 %__B, i64 %__C, i32 15)
ret i64 %0
diff --git a/llvm/test/MC/Disassembler/X86/apx/cmpccxadd.txt b/llvm/test/MC/Disassembler/X86/apx/cmpccxadd.txt
index 7a2e09af5b3db3..2a54bebd5212c9 100644
--- a/llvm/test/MC/Disassembler/X86/apx/cmpccxadd.txt
+++ b/llvm/test/MC/Disassembler/X86/apx/cmpccxadd.txt
@@ -1,20 +1,20 @@
# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s --check-prefixes=ATT
# RUN: llvm-mc --disassemble %s -triple=x86_64 -x86-asm-syntax=intel --output-asm-variant=1 | FileCheck %s --check-prefixes=INTEL
-# ATT: cmpaxadd %ecx, %edx, 123(%rax,%rbx,4)
-# INTEL: cmpaxadd dword ptr [rax + 4*rbx + 123], edx, ecx
+# ATT: cmpnbexadd %ecx, %edx, 123(%rax,%rbx,4)
+# INTEL: cmpnbexadd dword ptr [rax + 4*rbx + 123], edx, ecx
0x62,0xf2,0x75,0x08,0xe7,0x54,0x98,0x7b
-# ATT: cmpaxadd %r9, %r15, 123(%rax,%rbx,4)
-# INTEL: cmpaxadd qword ptr [rax + 4*rbx + 123], r15, r9
+# ATT: cmpnbexadd %r9, %r15, 123(%rax,%rbx,4)
+# INTEL: cmpnbexadd qword ptr [rax + 4*rbx + 123], r15, r9
0x62,0x72,0xb5,0x08,0xe7,0x7c,0x98,0x7b
-# ATT: cmpaxadd %r18d, %r22d, 291(%r28,%r29,4)
-# INTEL: cmpaxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+# ATT: cmpnbexadd %r18d, %r22d, 291(%r28,%r29,4)
+# INTEL: cmpnbexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
0x62,0x8a,0x69,0x00,0xe7,0xb4,0xac,0x23,0x01,0x00,0x00
-# ATT: cmpaxadd %r19, %r23, 291(%r28,%r29,4)
-# INTEL: cmpaxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+# ATT: cmpnbexadd %r19, %r23, 291(%r28,%r29,4)
+# INTEL: cmpnbexadd qword ptr [r28 + 4*r29 + 291], r23, r19
0x62,0x8a,0xe1,0x00,0xe7,0xbc,0xac,0x23,0x01,0x00,0x00
# ATT: cmpbexadd %ecx, %edx, 123(%rax,%rbx,4)
@@ -49,52 +49,52 @@
# INTEL: cmpbxadd qword ptr [r28 + 4*r29 + 291], r23, r19
0x62,0x8a,0xe1,0x00,0xe2,0xbc,0xac,0x23,0x01,0x00,0x00
-# ATT: cmpexadd %ecx, %edx, 123(%rax,%rbx,4)
-# INTEL: cmpexadd dword ptr [rax + 4*rbx + 123], edx, ecx
+# ATT: cmpzxadd %ecx, %edx, 123(%rax,%rbx,4)
+# INTEL: cmpzxadd dword ptr [rax + 4*rbx + 123], edx, ecx
0x62,0xf2,0x75,0x08,0xe4,0x54,0x98,0x7b
-# ATT: cmpexadd %r9, %r15, 123(%rax,%rbx,4)
-# INTEL: cmpexadd qword ptr [rax + 4*rbx + 123], r15, r9
+# ATT: cmpzxadd %r9, %r15, 123(%rax,%rbx,4)
+# INTEL: cmpzxadd qword ptr [rax + 4*rbx + 123], r15, r9
0x62,0x72,0xb5,0x08,0xe4,0x7c,0x98,0x7b
-# ATT: cmpexadd %r18d, %r22d, 291(%r28,%r29,4)
-# INTEL: cmpexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+# ATT: cmpzxadd %r18d, %r22d, 291(%r28,%r29,4)
+# INTEL: cmpzxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
0x62,0x8a,0x69,0x00,0xe4,0xb4,0xac,0x23,0x01,0x00,0x00
-# ATT: cmpexadd %r19, %r23, 291(%r28,%r29,4)
-# INTEL: cmpexadd qword ptr [r28 + 4*r29 + 291], r23, r19
+# ATT: cmpzxadd %r19, %r23, 291(%r28,%r29,4)
+# INTEL: cmpzxadd qword ptr [r28 + 4*r29 + 291], r23, r19
0x62,0x8a,0xe1,0x00,0xe4,0xbc,0xac,0x23,0x01,0x00,0x00
-# ATT: cmpgexadd %ecx, %edx, 123(%rax,%rbx,4)
-# INTEL: cmpgexadd dword ptr [rax + 4*rbx + 123], edx, ecx
+# ATT: cmpnlxadd %ecx, %edx, 123(%rax,%rbx,4)
+# INTEL: cmpnlxadd dword ptr [rax + 4*rbx + 123], edx, ecx
0x62,0xf2,0x75,0x08,0xed,0x54,0x98,0x7b
-# ATT: cmpgexadd %r9, %r15, 123(%rax,%rbx,4)
-# INTEL: cmpgexadd qword ptr [rax + 4*rbx + 123], r15, r9
+# ATT: cmpnlxadd %r9, %r15, 123(%rax,%rbx,4)
+# INTEL: cmpnlxadd qword ptr [rax + 4*rbx + 123], r15, r9
0x62,0x72,0xb5,0x08,0xed,0x7c,0x98,0x7b
-# ATT: cmpgexadd %r18d, %r22d, 291(%r28,%r29,4)
-# INTEL: cmpgexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+# ATT: cmpnlxadd %r18d, %r22d, 291(%r28,%r29,4)
+# INTEL: cmpnlxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
0x62,0x8a,0x69,0x00,0xed,0xb4,0xac,0x23,0x01,0x00,0x00
-# ATT: cmpgexadd %r19, %r23, 291(%r28,%r29,4)
-# INTEL: cmpgexadd qword ptr [r28 + 4*r29 + 291], r23, r19
+# ATT: cmpnlxadd %r19, %r23, 291(%r28,%r29,4)
+# INTEL: cmpnlxadd qword ptr [r28 + 4*r29 + 291], r23, r19
0x62,0x8a,0xe1,0x00,0xed,0xbc,0xac,0x23,0x01,0x00,0x00
-# ATT: cmpgxadd %ecx, %edx, 123(%rax,%rbx,4)
-# INTEL: cmpgxadd dword ptr [rax + 4*rbx + 123], edx, ecx
+# ATT: cmpnlexadd %ecx, %edx, 123(%rax,%rbx,4)
+# INTEL: cmpnlexadd dword ptr [rax + 4*rbx + 123], edx, ecx
0x62,0xf2,0x75,0x08,0xef,0x54,0x98,0x7b
-# ATT: cmpgxadd %r9, %r15, 123(%rax,%rbx,4)
-# INTEL: cmpgxadd qword ptr [rax + 4*rbx + 123], r15, r9
+# ATT: cmpnlexadd %r9, %r15, 123(%rax,%rbx,4)
+# INTEL: cmpnlexadd qword ptr [rax + 4*rbx + 123], r15, r9
0x62,0x72,0xb5,0x08,0xef,0x7c,0x98,0x7b
-# ATT: cmpgxadd %r18d, %r22d, 291(%r28,%r29,4)
-# INTEL: cmpgxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+# ATT: cmpnlexadd %r18d, %r22d, 291(%r28,%r29,4)
+# INTEL: cmpnlexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
0x62,0x8a,0x69,0x00,0xef,0xb4,0xac,0x23,0x01,0x00,0x00
-# ATT: cmpgxadd %r19, %r23, 291(%r28,%r29,4)
-# INTEL: cmpgxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+# ATT: cmpnlexadd %r19, %r23, 291(%r28,%r29,4)
+# INTEL: cmpnlexadd qword ptr [r28 + 4*r29 + 291], r23, r19
0x62,0x8a,0xe1,0x00,0xef,0xbc,0xac,0x23,0x01,0x00,0x00
# ATT: cmplexadd %ecx, %edx, 123(%rax,%rbx,4)
@@ -129,20 +129,20 @@
# INTEL: cmplxadd qword ptr [r28 + 4*r29 + 291], r23, r19
0x62,0x8a,0xe1,0x00,0xec,0xbc,0xac,0x23,0x01,0x00,0x00
-# ATT: cmpnexadd %ecx, %edx, 123(%rax,%rbx,4)
-# INTEL: cmpnexadd dword ptr [rax + 4*rbx + 123], edx, ecx
+# ATT: cmpnzxadd %ecx, %edx, 123(%rax,%rbx,4)
+# INTEL: cmpnzxadd dword ptr [rax + 4*rbx + 123], edx, ecx
0x62,0xf2,0x75,0x08,0xe5,0x54,0x98,0x7b
-# ATT: cmpnexadd %r9, %r15, 123(%rax,%rbx,4)
-# INTEL: cmpnexadd qword ptr [rax + 4*rbx + 123], r15, r9
+# ATT: cmpnzxadd %r9, %r15, 123(%rax,%rbx,4)
+# INTEL: cmpnzxadd qword ptr [rax + 4*rbx + 123], r15, r9
0x62,0x72,0xb5,0x08,0xe5,0x7c,0x98,0x7b
-# ATT: cmpnexadd %r18d, %r22d, 291(%r28,%r29,4)
-# INTEL: cmpnexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+# ATT: cmpnzxadd %r18d, %r22d, 291(%r28,%r29,4)
+# INTEL: cmpnzxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
0x62,0x8a,0x69,0x00,0xe5,0xb4,0xac,0x23,0x01,0x00,0x00
-# ATT: cmpnexadd %r19, %r23, 291(%r28,%r29,4)
-# INTEL: cmpnexadd qword ptr [r28 + 4*r29 + 291], r23, r19
+# ATT: cmpnzxadd %r19, %r23, 291(%r28,%r29,4)
+# INTEL: cmpnzxadd qword ptr [r28 + 4*r29 + 291], r23, r19
0x62,0x8a,0xe1,0x00,0xe5,0xbc,0xac,0x23,0x01,0x00,0x00
# ATT: cmpnoxadd %ecx, %edx, 123(%rax,%rbx,4)
diff --git a/llvm/test/MC/X86/apx/cmpccxadd-att.s b/llvm/test/MC/X86/apx/cmpccxadd-att.s
index 7ff803ad79ecbc..0a21abbd0ed250 100644
--- a/llvm/test/MC/X86/apx/cmpccxadd-att.s
+++ b/llvm/test/MC/X86/apx/cmpccxadd-att.s
@@ -3,21 +3,21 @@
# ERROR-COUNT-60: error:
# ERROR-NOT: error:
-# CHECK: {evex} cmpaxadd %ecx, %edx, 123(%rax,%rbx,4)
+# CHECK: {evex} cmpnbexadd %ecx, %edx, 123(%rax,%rbx,4)
# CHECK: encoding: [0x62,0xf2,0x75,0x08,0xe7,0x54,0x98,0x7b]
- {evex} cmpaxadd %ecx, %edx, 123(%rax,%rbx,4)
+ {evex} cmpnbexadd %ecx, %edx, 123(%rax,%rbx,4)
-# CHECK: {evex} cmpaxadd %r9, %r15, 123(%rax,%rbx,4)
+# CHECK: {evex} cmpnbexadd %r9, %r15, 123(%rax,%rbx,4)
# CHECK: encoding: [0x62,0x72,0xb5,0x08,0xe7,0x7c,0x98,0x7b]
- {evex} cmpaxadd %r9, %r15, 123(%rax,%rbx,4)
+ {evex} cmpnbexadd %r9, %r15, 123(%rax,%rbx,4)
-# CHECK: cmpaxadd %r18d, %r22d, 291(%r28,%r29,4)
+# CHECK: cmpnbexadd %r18d, %r22d, 291(%r28,%r29,4)
# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xe7,0xb4,0xac,0x23,0x01,0x00,0x00]
- cmpaxadd %r18d, %r22d, 291(%r28,%r29,4)
+ cmpnbexadd %r18d, %r22d, 291(%r28,%r29,4)
-# CHECK: cmpaxadd %r19, %r23, 291(%r28,%r29,4)
+# CHECK: cmpnbexadd %r19, %r23, 291(%r28,%r29,4)
# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xe7,0xbc,0xac,0x23,0x01,0x00,0x00]
- cmpaxadd %r19, %r23, 291(%r28,%r29,4)
+ cmpnbexadd %r19, %r23, 291(%r28,%r29,4)
# CHECK: {evex} cmpbexadd %ecx, %edx, 123(%rax,%rbx,4)
# CHECK: encoding: [0x62,0xf2,0x75,0x08,0xe6,0x54,0x98,0x7b]
@@ -51,53 +51,53 @@
# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xe2,0xbc,0xac,0x23,0x01,0x00,0x00]
cmpbxadd %r19, %r23, 291(%r28,%r29,4)
-# CHECK: {evex} cmpexadd %ecx, %edx, 123(%rax,%rbx,4)
+# CHECK: {evex} cmpzxadd %ecx, %edx, 123(%rax,%rbx,4)
# CHECK: encoding: [0x62,0xf2,0x75,0x08,0xe4,0x54,0x98,0x7b]
- {evex} cmpexadd %ecx, %edx, 123(%rax,%rbx,4)
+ {evex} cmpzxadd %ecx, %edx, 123(%rax,%rbx,4)
-# CHECK: {evex} cmpexadd %r9, %r15, 123(%rax,%rbx,4)
+# CHECK: {evex} cmpzxadd %r9, %r15, 123(%rax,%rbx,4)
# CHECK: encoding: [0x62,0x72,0xb5,0x08,0xe4,0x7c,0x98,0x7b]
- {evex} cmpexadd %r9, %r15, 123(%rax,%rbx,4)
+ {evex} cmpzxadd %r9, %r15, 123(%rax,%rbx,4)
-# CHECK: cmpexadd %r18d, %r22d, 291(%r28,%r29,4)
+# CHECK: cmpzxadd %r18d, %r22d, 291(%r28,%r29,4)
# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xe4,0xb4,0xac,0x23,0x01,0x00,0x00]
- cmpexadd %r18d, %r22d, 291(%r28,%r29,4)
+ cmpzxadd %r18d, %r22d, 291(%r28,%r29,4)
-# CHECK: cmpexadd %r19, %r23, 291(%r28,%r29,4)
+# CHECK: cmpzxadd %r19, %r23, 291(%r28,%r29,4)
# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xe4,0xbc,0xac,0x23,0x01,0x00,0x00]
- cmpexadd %r19, %r23, 291(%r28,%r29,4)
+ cmpzxadd %r19, %r23, 291(%r28,%r29,4)
-# CHECK: {evex} cmpgexadd %ecx, %edx, 123(%rax,%rbx,4)
+# CHECK: {evex} cmpnlxadd %ecx, %edx, 123(%rax,%rbx,4)
# CHECK: encoding: [0x62,0xf2,0x75,0x08,0xed,0x54,0x98,0x7b]
- {evex} cmpgexadd %ecx, %edx, 123(%rax,%rbx,4)
+ {evex} cmpnlxadd %ecx, %edx, 123(%rax,%rbx,4)
-# CHECK: {evex} cmpgexadd %r9, %r15, 123(%rax,%rbx,4)
+# CHECK: {evex} cmpnlxadd %r9, %r15, 123(%rax,%rbx,4)
# CHECK: encoding: [0x62,0x72,0xb5,0x08,0xed,0x7c,0x98,0x7b]
- {evex} cmpgexadd %r9, %r15, 123(%rax,%rbx,4)
+ {evex} cmpnlxadd %r9, %r15, 123(%rax,%rbx,4)
-# CHECK: cmpgexadd %r18d, %r22d, 291(%r28,%r29,4)
+# CHECK: cmpnlxadd %r18d, %r22d, 291(%r28,%r29,4)
# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xed,0xb4,0xac,0x23,0x01,0x00,0x00]
- cmpgexadd %r18d, %r22d, 291(%r28,%r29,4)
+ cmpnlxadd %r18d, %r22d, 291(%r28,%r29,4)
-# CHECK: cmpgexadd %r19, %r23, 291(%r28,%r29,4)
+# CHECK: cmpnlxadd %r19, %r23, 291(%r28,%r29,4)
# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xed,0xbc,0xac,0x23,0x01,0x00,0x00]
- cmpgexadd %r19, %r23, 291(%r28,%r29,4)
+ cmpnlxadd %r19, %r23, 291(%r28,%r29,4)
-# CHECK: {evex} cmpgxadd %ecx, %edx, 123(%rax,%rbx,4)
+# CHECK: {evex} cmpnlexadd %ecx, %edx, 123(%rax,%rbx,4)
# CHECK: encoding: [0x62,0xf2,0x75,0x08,0xef,0x54,0x98,0x7b]
- {evex} cmpgxadd %ecx, %edx, 123(%rax,%rbx,4)
+ {evex} cmpnlexadd %ecx, %edx, 123(%rax,%rbx,4)
-# CHECK: {evex} cmpgxadd %r9, %r15, 123(%rax,%rbx,4)
+# CHECK: {evex} cmpnlexadd %r9, %r15, 123(%rax,%rbx,4)
# CHECK: encoding: [0x62,0x72,0xb5,0x08,0xef,0x7c,0x98,0x7b]
- {evex} cmpgxadd %r9, %r15, 123(%rax,%rbx,4)
+ {evex} cmpnlexadd %r9, %r15, 123(%rax,%rbx,4)
-# CHECK: cmpgxadd %r18d, %r22d, 291(%r28,%r29,4)
+# CHECK: cmpnlexadd %r18d, %r22d, 291(%r28,%r29,4)
# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xef,0xb4,0xac,0x23,0x01,0x00,0x00]
- cmpgxadd %r18d, %r22d, 291(%r28,%r29,4)
+ cmpnlexadd %r18d, %r22d, 291(%r28,%r29,4)
-# CHECK: cmpgxadd %r19, %r23, 291(%r28,%r29,4)
+# CHECK: cmpnlexadd %r19, %r23, 291(%r28,%r29,4)
# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xef,0xbc,0xac,0x23,0x01,0x00,0x00]
- cmpgxadd %r19, %r23, 291(%r28,%r29,4)
+ cmpnlexadd %r19, %r23, 291(%r28,%r29,4)
# CHECK: {evex} cmplexadd %ecx, %edx, 123(%rax,%rbx,4)
# CHECK: encoding: [0x62,0xf2,0x75,0x08,0xee,0x54,0x98,0x7b]
@@ -131,21 +131,21 @@
# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xec,0xbc,0xac,0x23,0x01,0x00,0x00]
cmplxadd %r19, %r23, 291(%r28,%r29,4)
-# CHECK: {evex} cmpnexadd %ecx, %edx, 123(%rax,%rbx,4)
+# CHECK: {evex} cmpnzxadd %ecx, %edx, 123(%rax,%rbx,4)
# CHECK: encoding: [0x62,0xf2,0x75,0x08,0xe5,0x54,0x98,0x7b]
- {evex} cmpnexadd %ecx, %edx, 123(%rax,%rbx,4)
+ {evex} cmpnzxadd %ecx, %edx, 123(%rax,%rbx,4)
-# CHECK: {evex} cmpnexadd %r9, %r15, 123(%rax,%rbx,4)
+# CHECK: {evex} cmpnzxadd %r9, %r15, 123(%rax,%rbx,4)
# CHECK: encoding: [0x62,0x72,0xb5,0x08,0xe5,0x7c,0x98,0x7b]
- {evex} cmpnexadd %r9, %r15, 123(%rax,%rbx,4)
+ {evex} cmpnzxadd %r9, %r15, 123(%rax,%rbx,4)
-# CHECK: cmpnexadd %r18d, %r22d, 291(%r28,%r29,4)
+# CHECK: cmpnzxadd %r18d, %r22d, 291(%r28,%r29,4)
# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xe5,0xb4,0xac,0x23,0x01,0x00,0x00]
- cmpnexadd %r18d, %r22d, 291(%r28,%r29,4)
+ cmpnzxadd %r18d, %r22d, 291(%r28,%r29,4)
-# CHECK: cmpnexadd %r19, %r23, 291(%r28,%r29,4)
+# CHECK: cmpnzxadd %r19, %r23, 291(%r28,%r29,4)
# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xe5,0xbc,0xac,0x23,0x01,0x00,0x00]
- cmpnexadd %r19, %r23, 291(%r28,%r29,4)
+ cmpnzxadd %r19, %r23, 291(%r28,%r29,4)
# CHECK: {evex} cmpnoxadd %ecx, %edx, 123(%rax,%rbx,4)
# CHECK: encoding: [0x62,0xf2,0x75,0x08,0xe1,0x54,0x98,0x7b]
diff --git a/llvm/test/MC/X86/apx/cmpccxadd-intel.s b/llvm/test/MC/X86/apx/cmpccxadd-intel.s
index cace33e59d6a74..4c44968fbf91ce 100644
--- a/llvm/test/MC/X86/apx/cmpccxadd-intel.s
+++ b/llvm/test/MC/X86/apx/cmpccxadd-intel.s
@@ -1,20 +1,20 @@
# RUN: llvm-mc -triple x86_64 -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s
-# CHECK: {evex} cmpaxadd dword ptr [rax + 4*rbx + 123], edx, ecx
+# CHECK: {evex} cmpnbexadd dword ptr [rax + 4*rbx + 123], edx, ecx
# CHECK: encoding: [0x62,0xf2,0x75,0x08,0xe7,0x54,0x98,0x7b]
- {evex} cmpaxadd dword ptr [rax + 4*rbx + 123], edx, ecx
+ {evex} cmpnbexadd dword ptr [rax + 4*rbx + 123], edx, ecx
-# CHECK: {evex} cmpaxadd qword ptr [rax + 4*rbx + 123], r15, r9
+# CHECK: {evex} cmpnbexadd qword ptr [rax + 4*rbx + 123], r15, r9
# CHECK: encoding: [0x62,0x72,0xb5,0x08,0xe7,0x7c,0x98,0x7b]
- {evex} cmpaxadd qword ptr [rax + 4*rbx + 123], r15, r9
+ {evex} cmpnbexadd qword ptr [rax + 4*rbx + 123], r15, r9
-# CHECK: cmpaxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+# CHECK: cmpnbexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xe7,0xb4,0xac,0x23,0x01,0x00,0x00]
- cmpaxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+ cmpnbexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
-# CHECK: cmpaxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+# CHECK: cmpnbexadd qword ptr [r28 + 4*r29 + 291], r23, r19
# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xe7,0xbc,0xac,0x23,0x01,0x00,0x00]
- cmpaxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+ cmpnbexadd qword ptr [r28 + 4*r29 + 291], r23, r19
# CHECK: {evex} cmpbexadd dword ptr [rax + 4*rbx + 123], edx, ecx
# CHECK: encoding: [0x62,0xf2,0x75,0x08,0xe6,0x54,0x98,0x7b]
@@ -48,53 +48,53 @@
# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xe2,0xbc,0xac,0x23,0x01,0x00,0x00]
cmpbxadd qword ptr [r28 + 4*r29 + 291], r23, r19
-# CHECK: {evex} cmpexadd dword ptr [rax + 4*rbx + 123], edx, ecx
+# CHECK: {evex} cmpzxadd dword ptr [rax + 4*rbx + 123], edx, ecx
# CHECK: encoding: [0x62,0xf2,0x75,0x08,0xe4,0x54,0x98,0x7b]
- {evex} cmpexadd dword ptr [rax + 4*rbx + 123], edx, ecx
+ {evex} cmpzxadd dword ptr [rax + 4*rbx + 123], edx, ecx
-# CHECK: {evex} cmpexadd qword ptr [rax + 4*rbx + 123], r15, r9
+# CHECK: {evex} cmpzxadd qword ptr [rax + 4*rbx + 123], r15, r9
# CHECK: encoding: [0x62,0x72,0xb5,0x08,0xe4,0x7c,0x98,0x7b]
- {evex} cmpexadd qword ptr [rax + 4*rbx + 123], r15, r9
+ {evex} cmpzxadd qword ptr [rax + 4*rbx + 123], r15, r9
-# CHECK: cmpexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+# CHECK: cmpzxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xe4,0xb4,0xac,0x23,0x01,0x00,0x00]
- cmpexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+ cmpzxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
-# CHECK: cmpexadd qword ptr [r28 + 4*r29 + 291], r23, r19
+# CHECK: cmpzxadd qword ptr [r28 + 4*r29 + 291], r23, r19
# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xe4,0xbc,0xac,0x23,0x01,0x00,0x00]
- cmpexadd qword ptr [r28 + 4*r29 + 291], r23, r19
+ cmpzxadd qword ptr [r28 + 4*r29 + 291], r23, r19
-# CHECK: {evex} cmpgexadd dword ptr [rax + 4*rbx + 123], edx, ecx
+# CHECK: {evex} cmpnlxadd dword ptr [rax + 4*rbx + 123], edx, ecx
# CHECK: encoding: [0x62,0xf2,0x75,0x08,0xed,0x54,0x98,0x7b]
- {evex} cmpgexadd dword ptr [rax + 4*rbx + 123], edx, ecx
+ {evex} cmpnlxadd dword ptr [rax + 4*rbx + 123], edx, ecx
-# CHECK: {evex} cmpgexadd qword ptr [rax + 4*rbx + 123], r15, r9
+# CHECK: {evex} cmpnlxadd qword ptr [rax + 4*rbx + 123], r15, r9
# CHECK: encoding: [0x62,0x72,0xb5,0x08,0xed,0x7c,0x98,0x7b]
- {evex} cmpgexadd qword ptr [rax + 4*rbx + 123], r15, r9
+ {evex} cmpnlxadd qword ptr [rax + 4*rbx + 123], r15, r9
-# CHECK: cmpgexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+# CHECK: cmpnlxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xed,0xb4,0xac,0x23,0x01,0x00,0x00]
- cmpgexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+ cmpnlxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
-# CHECK: cmpgexadd qword ptr [r28 + 4*r29 + 291], r23, r19
+# CHECK: cmpnlxadd qword ptr [r28 + 4*r29 + 291], r23, r19
# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xed,0xbc,0xac,0x23,0x01,0x00,0x00]
- cmpgexadd qword ptr [r28 + 4*r29 + 291], r23, r19
+ cmpnlxadd qword ptr [r28 + 4*r29 + 291], r23, r19
-# CHECK: {evex} cmpgxadd dword ptr [rax + 4*rbx + 123], edx, ecx
+# CHECK: {evex} cmpnlexadd dword ptr [rax + 4*rbx + 123], edx, ecx
# CHECK: encoding: [0x62,0xf2,0x75,0x08,0xef,0x54,0x98,0x7b]
- {evex} cmpgxadd dword ptr [rax + 4*rbx + 123], edx, ecx
+ {evex} cmpnlexadd dword ptr [rax + 4*rbx + 123], edx, ecx
-# CHECK: {evex} cmpgxadd qword ptr [rax + 4*rbx + 123], r15, r9
+# CHECK: {evex} cmpnlexadd qword ptr [rax + 4*rbx + 123], r15, r9
# CHECK: encoding: [0x62,0x72,0xb5,0x08,0xef,0x7c,0x98,0x7b]
- {evex} cmpgxadd qword ptr [rax + 4*rbx + 123], r15, r9
+ {evex} cmpnlexadd qword ptr [rax + 4*rbx + 123], r15, r9
-# CHECK: cmpgxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+# CHECK: cmpnlexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xef,0xb4,0xac,0x23,0x01,0x00,0x00]
- cmpgxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+ cmpnlexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
-# CHECK: cmpgxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+# CHECK: cmpnlexadd qword ptr [r28 + 4*r29 + 291], r23, r19
# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xef,0xbc,0xac,0x23,0x01,0x00,0x00]
- cmpgxadd qword ptr [r28 + 4*r29 + 291], r23, r19
+ cmpnlexadd qword ptr [r28 + 4*r29 + 291], r23, r19
# CHECK: {evex} cmplexadd dword ptr [rax + 4*rbx + 123], edx, ecx
# CHECK: encoding: [0x62,0xf2,0x75,0x08,0xee,0x54,0x98,0x7b]
@@ -128,21 +128,21 @@
# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xec,0xbc,0xac,0x23,0x01,0x00,0x00]
cmplxadd qword ptr [r28 + 4*r29 + 291], r23, r19
-# CHECK: {evex} cmpnexadd dword ptr [rax + 4*rbx + 123], edx, ecx
+# CHECK: {evex} cmpnzxadd dword ptr [rax + 4*rbx + 123], edx, ecx
# CHECK: encoding: [0x62,0xf2,0x75,0x08,0xe5,0x54,0x98,0x7b]
- {evex} cmpnexadd dword ptr [rax + 4*rbx + 123], edx, ecx
+ {evex} cmpnzxadd dword ptr [rax + 4*rbx + 123], edx, ecx
-# CHECK: {evex} cmpnexadd qword ptr [rax + 4*rbx + 123], r15, r9
+# CHECK: {evex} cmpnzxadd qword ptr [rax + 4*rbx + 123], r15, r9
# CHECK: encoding: [0x62,0x72,0xb5,0x08,0xe5,0x7c,0x98,0x7b]
- {evex} cmpnexadd qword ptr [rax + 4*rbx + 123], r15, r9
+ {evex} cmpnzxadd qword ptr [rax + 4*rbx + 123], r15, r9
-# CHECK: cmpnexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+# CHECK: cmpnzxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
# CHECK: encoding: [0x62,0x8a,0x69,0x00,0xe5,0xb4,0xac,0x23,0x01,0x00,0x00]
- cmpnexadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
+ cmpnzxadd dword ptr [r28 + 4*r29 + 291], r22d, r18d
-# CHECK: cmpnexadd qword ptr [r28 + 4*r29 + 291], r23, r19
+# CHECK: cmpnzxadd qword ptr [r28 + 4*r29 + 291], r23, r19
# CHECK: encoding: [0x62,0x8a,0xe1,0x00,0xe5,0xbc,0xac,0x23,0x01,0x00,0x00]
- cmpnexadd qword ptr [r28 + 4*r29 + 291], r23, r19
+ cmpnzxadd qword ptr [r28 + 4*r29 + 291], r23, r19
# CHECK: {evex} cmpnoxadd dword ptr [rax + 4*rbx + 123], edx, ecx
# CHECK: encoding: [0x62,0xf2,0x75,0x08,0xe1,0x54,0x98,0x7b]
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