[llvm] [TailDuplicator] Add a limit on the size of predecessors (PR #78582)
Quentin Dian via llvm-commits
llvm-commits at lists.llvm.org
Sun Jan 21 02:43:18 PST 2024
https://github.com/DianQK updated https://github.com/llvm/llvm-project/pull/78582
>From cf0c0fb59a563e64fe312c9c070880a3d75b55b1 Mon Sep 17 00:00:00 2001
From: DianQK <dianqk at dianqk.net>
Date: Thu, 18 Jan 2024 20:59:31 +0800
Subject: [PATCH 1/3] Pre-commit test cases
---
.../CodeGen/X86/tail-dup-pred-size-limit.mir | 436 ++++++++++++++++++
1 file changed, 436 insertions(+)
create mode 100644 llvm/test/CodeGen/X86/tail-dup-pred-size-limit.mir
diff --git a/llvm/test/CodeGen/X86/tail-dup-pred-size-limit.mir b/llvm/test/CodeGen/X86/tail-dup-pred-size-limit.mir
new file mode 100644
index 00000000000000..63deca7bb1d141
--- /dev/null
+++ b/llvm/test/CodeGen/X86/tail-dup-pred-size-limit.mir
@@ -0,0 +1,436 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
+# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass=early-tailduplication %s -o - | FileCheck %s -check-prefix=LIMIT
+# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass=early-tailduplication %s -o - | FileCheck %s -check-prefix=NOLIMIT
+
+--- |
+ source_filename = "tail-dup-pred-size-limit.ll"
+ target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
+
+ define i32 @foo(ptr %0, i32 %1) {
+ %3 = lshr i32 %1, 1
+ %4 = and i32 %3, 7
+ switch i32 %4, label %default.unreachable2 [
+ i32 0, label %5
+ i32 1, label %7
+ i32 2, label %10
+ i32 3, label %13
+ ]
+
+ 5: ; preds = %2
+ %6 = load i32, ptr %0, align 4
+ br label %16
+
+ 7: ; preds = %2
+ %8 = load i32, ptr %0, align 4
+ %9 = lshr i32 %8, 1
+ br label %16
+
+ 10: ; preds = %2
+ %11 = load i32, ptr %0, align 4
+ %12 = lshr i32 %11, 2
+ br label %16
+
+ 13: ; preds = %2
+ %14 = load i32, ptr %0, align 4
+ %15 = lshr i32 %14, 3
+ br label %16
+
+ default.unreachable2: ; preds = %16, %2
+ unreachable
+
+ 16: ; preds = %13, %10, %7, %5
+ %17 = phi i32 [ %15, %13 ], [ %12, %10 ], [ %9, %7 ], [ %6, %5 ]
+ %18 = lshr i32 %1, 2
+ %19 = and i32 %18, 7
+ switch i32 %19, label %default.unreachable2 [
+ i32 0, label %20
+ i32 1, label %22
+ i32 2, label %25
+ i32 3, label %28
+ ]
+
+ 20: ; preds = %16
+ %21 = load i32, ptr %0, align 4
+ br label %31
+
+ 22: ; preds = %16
+ %23 = load i32, ptr %0, align 4
+ %24 = lshr i32 %23, 1
+ br label %31
+
+ 25: ; preds = %16
+ %26 = load i32, ptr %0, align 4
+ %27 = lshr i32 %26, 2
+ br label %31
+
+ 28: ; preds = %16
+ %29 = load i32, ptr %0, align 4
+ %30 = lshr i32 %29, 6
+ br label %31
+
+ 31: ; preds = %28, %25, %22, %20
+ %32 = phi i32 [ %30, %28 ], [ %27, %25 ], [ %24, %22 ], [ %21, %20 ]
+ %33 = or i32 %32, %17
+ ret i32 %33
+ }
+
+...
+---
+name: foo
+alignment: 16
+exposesReturnsTwice: false
+legalized: false
+regBankSelected: false
+selected: false
+failedISel: false
+tracksRegLiveness: true
+hasWinCFI: false
+callsEHReturn: false
+callsUnwindInit: false
+hasEHCatchret: false
+hasEHScopes: false
+hasEHFunclets: false
+isOutlined: false
+debugInstrRef: true
+failsVerification: false
+tracksDebugUserValues: false
+registers:
+ - { id: 0, class: gr32, preferred-register: '' }
+ - { id: 1, class: gr32, preferred-register: '' }
+ - { id: 2, class: gr32, preferred-register: '' }
+ - { id: 3, class: gr32, preferred-register: '' }
+ - { id: 4, class: gr32, preferred-register: '' }
+ - { id: 5, class: gr32, preferred-register: '' }
+ - { id: 6, class: gr32, preferred-register: '' }
+ - { id: 7, class: gr32, preferred-register: '' }
+ - { id: 8, class: gr32, preferred-register: '' }
+ - { id: 9, class: gr32, preferred-register: '' }
+ - { id: 10, class: gr64, preferred-register: '' }
+ - { id: 11, class: gr32, preferred-register: '' }
+ - { id: 12, class: gr64_nosp, preferred-register: '' }
+ - { id: 13, class: gr32, preferred-register: '' }
+ - { id: 14, class: gr32, preferred-register: '' }
+ - { id: 15, class: gr32, preferred-register: '' }
+ - { id: 16, class: gr32, preferred-register: '' }
+ - { id: 17, class: gr32, preferred-register: '' }
+ - { id: 18, class: gr64_nosp, preferred-register: '' }
+ - { id: 19, class: gr32, preferred-register: '' }
+ - { id: 20, class: gr32, preferred-register: '' }
+ - { id: 21, class: gr32, preferred-register: '' }
+ - { id: 22, class: gr32, preferred-register: '' }
+ - { id: 23, class: gr32, preferred-register: '' }
+ - { id: 24, class: gr32, preferred-register: '' }
+liveins:
+ - { reg: '$rdi', virtual-reg: '%10' }
+ - { reg: '$esi', virtual-reg: '%11' }
+frameInfo:
+ isFrameAddressTaken: false
+ isReturnAddressTaken: false
+ hasStackMap: false
+ hasPatchPoint: false
+ stackSize: 0
+ offsetAdjustment: 0
+ maxAlignment: 1
+ adjustsStack: false
+ hasCalls: false
+ stackProtector: ''
+ functionContext: ''
+ maxCallFrameSize: 4294967295
+ cvBytesOfCalleeSavedRegisters: 0
+ hasOpaqueSPAdjustment: false
+ hasVAStart: false
+ hasMustTailInVarArgFunc: false
+ hasTailCall: false
+ localFrameSize: 0
+ savePoint: ''
+ restorePoint: ''
+fixedStack: []
+stack: []
+entry_values: []
+callSites: []
+debugValueSubstitutions: []
+constants: []
+machineFunctionInfo: {}
+jumpTable:
+ kind: block-address
+ entries:
+ - id: 0
+ blocks: [ '%bb.1', '%bb.2', '%bb.3', '%bb.4' ]
+ - id: 1
+ blocks: [ '%bb.7', '%bb.8', '%bb.9', '%bb.10' ]
+body: |
+ ; LIMIT-LABEL: name: foo
+ ; LIMIT: bb.0 (%ir-block.2):
+ ; LIMIT-NEXT: successors: %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000), %bb.5(0x20000000)
+ ; LIMIT-NEXT: liveins: $rdi, $esi
+ ; LIMIT-NEXT: {{ $}}
+ ; LIMIT-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $esi
+ ; LIMIT-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi
+ ; LIMIT-NEXT: [[SHR32ri:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 1, implicit-def dead $eflags
+ ; LIMIT-NEXT: [[AND32ri:%[0-9]+]]:gr32 = AND32ri [[SHR32ri]], 7, implicit-def dead $eflags
+ ; LIMIT-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, killed [[AND32ri]], %subreg.sub_32bit
+ ; LIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG]], %jump-table.0, $noreg :: (load (s64) from jump-table)
+ ; LIMIT-NEXT: {{ $}}
+ ; LIMIT-NEXT: bb.2 (%ir-block.5):
+ ; LIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
+ ; LIMIT-NEXT: {{ $}}
+ ; LIMIT-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
+ ; LIMIT-NEXT: [[SHR32ri1:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags
+ ; LIMIT-NEXT: [[AND32ri1:%[0-9]+]]:gr32 = AND32ri [[SHR32ri1]], 7, implicit-def dead $eflags
+ ; LIMIT-NEXT: [[SUBREG_TO_REG1:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri1]], %subreg.sub_32bit
+ ; LIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG1]], %jump-table.1, $noreg :: (load (s64) from jump-table)
+ ; LIMIT-NEXT: {{ $}}
+ ; LIMIT-NEXT: bb.3 (%ir-block.7):
+ ; LIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
+ ; LIMIT-NEXT: {{ $}}
+ ; LIMIT-NEXT: [[MOV32rm1:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
+ ; LIMIT-NEXT: [[SHR32ri2:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm1]], 1, implicit-def dead $eflags
+ ; LIMIT-NEXT: [[SHR32ri3:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags
+ ; LIMIT-NEXT: [[AND32ri2:%[0-9]+]]:gr32 = AND32ri [[SHR32ri3]], 7, implicit-def dead $eflags
+ ; LIMIT-NEXT: [[SUBREG_TO_REG2:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri2]], %subreg.sub_32bit
+ ; LIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG2]], %jump-table.1, $noreg :: (load (s64) from jump-table)
+ ; LIMIT-NEXT: {{ $}}
+ ; LIMIT-NEXT: bb.4 (%ir-block.10):
+ ; LIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
+ ; LIMIT-NEXT: {{ $}}
+ ; LIMIT-NEXT: [[MOV32rm2:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
+ ; LIMIT-NEXT: [[SHR32ri4:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm2]], 2, implicit-def dead $eflags
+ ; LIMIT-NEXT: [[SHR32ri5:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags
+ ; LIMIT-NEXT: [[AND32ri3:%[0-9]+]]:gr32 = AND32ri [[SHR32ri5]], 7, implicit-def dead $eflags
+ ; LIMIT-NEXT: [[SUBREG_TO_REG3:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri3]], %subreg.sub_32bit
+ ; LIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG3]], %jump-table.1, $noreg :: (load (s64) from jump-table)
+ ; LIMIT-NEXT: {{ $}}
+ ; LIMIT-NEXT: bb.5 (%ir-block.13):
+ ; LIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
+ ; LIMIT-NEXT: {{ $}}
+ ; LIMIT-NEXT: [[MOV32rm3:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
+ ; LIMIT-NEXT: [[SHR32ri6:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm3]], 3, implicit-def dead $eflags
+ ; LIMIT-NEXT: [[SHR32ri7:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags
+ ; LIMIT-NEXT: [[AND32ri4:%[0-9]+]]:gr32 = AND32ri [[SHR32ri7]], 7, implicit-def dead $eflags
+ ; LIMIT-NEXT: [[SUBREG_TO_REG4:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri4]], %subreg.sub_32bit
+ ; LIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG4]], %jump-table.1, $noreg :: (load (s64) from jump-table)
+ ; LIMIT-NEXT: {{ $}}
+ ; LIMIT-NEXT: bb.6.default.unreachable2:
+ ; LIMIT-NEXT: successors:
+ ; LIMIT-NEXT: {{ $}}
+ ; LIMIT-NEXT: {{ $}}
+ ; LIMIT-NEXT: bb.9 (%ir-block.20):
+ ; LIMIT-NEXT: successors: %bb.13(0x80000000)
+ ; LIMIT-NEXT: {{ $}}
+ ; LIMIT-NEXT: [[PHI:%[0-9]+]]:gr32 = PHI [[MOV32rm]], %bb.2, [[SHR32ri2]], %bb.3, [[SHR32ri4]], %bb.4, [[SHR32ri6]], %bb.5
+ ; LIMIT-NEXT: [[MOV32rm4:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
+ ; LIMIT-NEXT: JMP_1 %bb.13
+ ; LIMIT-NEXT: {{ $}}
+ ; LIMIT-NEXT: bb.10 (%ir-block.22):
+ ; LIMIT-NEXT: successors: %bb.13(0x80000000)
+ ; LIMIT-NEXT: {{ $}}
+ ; LIMIT-NEXT: [[PHI1:%[0-9]+]]:gr32 = PHI [[MOV32rm]], %bb.2, [[SHR32ri2]], %bb.3, [[SHR32ri4]], %bb.4, [[SHR32ri6]], %bb.5
+ ; LIMIT-NEXT: [[MOV32rm5:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
+ ; LIMIT-NEXT: [[SHR32ri8:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm5]], 1, implicit-def dead $eflags
+ ; LIMIT-NEXT: JMP_1 %bb.13
+ ; LIMIT-NEXT: {{ $}}
+ ; LIMIT-NEXT: bb.11 (%ir-block.25):
+ ; LIMIT-NEXT: successors: %bb.13(0x80000000)
+ ; LIMIT-NEXT: {{ $}}
+ ; LIMIT-NEXT: [[PHI2:%[0-9]+]]:gr32 = PHI [[MOV32rm]], %bb.2, [[SHR32ri2]], %bb.3, [[SHR32ri4]], %bb.4, [[SHR32ri6]], %bb.5
+ ; LIMIT-NEXT: [[MOV32rm6:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
+ ; LIMIT-NEXT: [[SHR32ri9:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm6]], 2, implicit-def dead $eflags
+ ; LIMIT-NEXT: JMP_1 %bb.13
+ ; LIMIT-NEXT: {{ $}}
+ ; LIMIT-NEXT: bb.12 (%ir-block.28):
+ ; LIMIT-NEXT: successors: %bb.13(0x80000000)
+ ; LIMIT-NEXT: {{ $}}
+ ; LIMIT-NEXT: [[PHI3:%[0-9]+]]:gr32 = PHI [[MOV32rm]], %bb.2, [[SHR32ri2]], %bb.3, [[SHR32ri4]], %bb.4, [[SHR32ri6]], %bb.5
+ ; LIMIT-NEXT: [[MOV32rm7:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
+ ; LIMIT-NEXT: [[SHR32ri10:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm7]], 6, implicit-def dead $eflags
+ ; LIMIT-NEXT: {{ $}}
+ ; LIMIT-NEXT: bb.13 (%ir-block.31):
+ ; LIMIT-NEXT: [[PHI4:%[0-9]+]]:gr32 = PHI [[PHI]], %bb.9, [[PHI1]], %bb.10, [[PHI2]], %bb.11, [[PHI3]], %bb.12
+ ; LIMIT-NEXT: [[PHI5:%[0-9]+]]:gr32 = PHI [[SHR32ri10]], %bb.12, [[SHR32ri9]], %bb.11, [[SHR32ri8]], %bb.10, [[MOV32rm4]], %bb.9
+ ; LIMIT-NEXT: [[OR32rr:%[0-9]+]]:gr32 = OR32rr [[PHI5]], [[PHI4]], implicit-def dead $eflags
+ ; LIMIT-NEXT: $eax = COPY [[OR32rr]]
+ ; LIMIT-NEXT: RET 0, $eax
+ ;
+ ; NOLIMIT-LABEL: name: foo
+ ; NOLIMIT: bb.0 (%ir-block.2):
+ ; NOLIMIT-NEXT: successors: %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000), %bb.5(0x20000000)
+ ; NOLIMIT-NEXT: liveins: $rdi, $esi
+ ; NOLIMIT-NEXT: {{ $}}
+ ; NOLIMIT-NEXT: [[COPY:%[0-9]+]]:gr32 = COPY $esi
+ ; NOLIMIT-NEXT: [[COPY1:%[0-9]+]]:gr64 = COPY $rdi
+ ; NOLIMIT-NEXT: [[SHR32ri:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 1, implicit-def dead $eflags
+ ; NOLIMIT-NEXT: [[AND32ri:%[0-9]+]]:gr32 = AND32ri [[SHR32ri]], 7, implicit-def dead $eflags
+ ; NOLIMIT-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, killed [[AND32ri]], %subreg.sub_32bit
+ ; NOLIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG]], %jump-table.0, $noreg :: (load (s64) from jump-table)
+ ; NOLIMIT-NEXT: {{ $}}
+ ; NOLIMIT-NEXT: bb.2 (%ir-block.5):
+ ; NOLIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
+ ; NOLIMIT-NEXT: {{ $}}
+ ; NOLIMIT-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
+ ; NOLIMIT-NEXT: [[SHR32ri1:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags
+ ; NOLIMIT-NEXT: [[AND32ri1:%[0-9]+]]:gr32 = AND32ri [[SHR32ri1]], 7, implicit-def dead $eflags
+ ; NOLIMIT-NEXT: [[SUBREG_TO_REG1:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri1]], %subreg.sub_32bit
+ ; NOLIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG1]], %jump-table.1, $noreg :: (load (s64) from jump-table)
+ ; NOLIMIT-NEXT: {{ $}}
+ ; NOLIMIT-NEXT: bb.3 (%ir-block.7):
+ ; NOLIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
+ ; NOLIMIT-NEXT: {{ $}}
+ ; NOLIMIT-NEXT: [[MOV32rm1:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
+ ; NOLIMIT-NEXT: [[SHR32ri2:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm1]], 1, implicit-def dead $eflags
+ ; NOLIMIT-NEXT: [[SHR32ri3:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags
+ ; NOLIMIT-NEXT: [[AND32ri2:%[0-9]+]]:gr32 = AND32ri [[SHR32ri3]], 7, implicit-def dead $eflags
+ ; NOLIMIT-NEXT: [[SUBREG_TO_REG2:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri2]], %subreg.sub_32bit
+ ; NOLIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG2]], %jump-table.1, $noreg :: (load (s64) from jump-table)
+ ; NOLIMIT-NEXT: {{ $}}
+ ; NOLIMIT-NEXT: bb.4 (%ir-block.10):
+ ; NOLIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
+ ; NOLIMIT-NEXT: {{ $}}
+ ; NOLIMIT-NEXT: [[MOV32rm2:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
+ ; NOLIMIT-NEXT: [[SHR32ri4:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm2]], 2, implicit-def dead $eflags
+ ; NOLIMIT-NEXT: [[SHR32ri5:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags
+ ; NOLIMIT-NEXT: [[AND32ri3:%[0-9]+]]:gr32 = AND32ri [[SHR32ri5]], 7, implicit-def dead $eflags
+ ; NOLIMIT-NEXT: [[SUBREG_TO_REG3:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri3]], %subreg.sub_32bit
+ ; NOLIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG3]], %jump-table.1, $noreg :: (load (s64) from jump-table)
+ ; NOLIMIT-NEXT: {{ $}}
+ ; NOLIMIT-NEXT: bb.5 (%ir-block.13):
+ ; NOLIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
+ ; NOLIMIT-NEXT: {{ $}}
+ ; NOLIMIT-NEXT: [[MOV32rm3:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
+ ; NOLIMIT-NEXT: [[SHR32ri6:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm3]], 3, implicit-def dead $eflags
+ ; NOLIMIT-NEXT: [[SHR32ri7:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags
+ ; NOLIMIT-NEXT: [[AND32ri4:%[0-9]+]]:gr32 = AND32ri [[SHR32ri7]], 7, implicit-def dead $eflags
+ ; NOLIMIT-NEXT: [[SUBREG_TO_REG4:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri4]], %subreg.sub_32bit
+ ; NOLIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG4]], %jump-table.1, $noreg :: (load (s64) from jump-table)
+ ; NOLIMIT-NEXT: {{ $}}
+ ; NOLIMIT-NEXT: bb.6.default.unreachable2:
+ ; NOLIMIT-NEXT: successors:
+ ; NOLIMIT-NEXT: {{ $}}
+ ; NOLIMIT-NEXT: {{ $}}
+ ; NOLIMIT-NEXT: bb.9 (%ir-block.20):
+ ; NOLIMIT-NEXT: successors: %bb.13(0x80000000)
+ ; NOLIMIT-NEXT: {{ $}}
+ ; NOLIMIT-NEXT: [[PHI:%[0-9]+]]:gr32 = PHI [[MOV32rm]], %bb.2, [[SHR32ri2]], %bb.3, [[SHR32ri4]], %bb.4, [[SHR32ri6]], %bb.5
+ ; NOLIMIT-NEXT: [[MOV32rm4:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
+ ; NOLIMIT-NEXT: JMP_1 %bb.13
+ ; NOLIMIT-NEXT: {{ $}}
+ ; NOLIMIT-NEXT: bb.10 (%ir-block.22):
+ ; NOLIMIT-NEXT: successors: %bb.13(0x80000000)
+ ; NOLIMIT-NEXT: {{ $}}
+ ; NOLIMIT-NEXT: [[PHI1:%[0-9]+]]:gr32 = PHI [[MOV32rm]], %bb.2, [[SHR32ri2]], %bb.3, [[SHR32ri4]], %bb.4, [[SHR32ri6]], %bb.5
+ ; NOLIMIT-NEXT: [[MOV32rm5:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
+ ; NOLIMIT-NEXT: [[SHR32ri8:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm5]], 1, implicit-def dead $eflags
+ ; NOLIMIT-NEXT: JMP_1 %bb.13
+ ; NOLIMIT-NEXT: {{ $}}
+ ; NOLIMIT-NEXT: bb.11 (%ir-block.25):
+ ; NOLIMIT-NEXT: successors: %bb.13(0x80000000)
+ ; NOLIMIT-NEXT: {{ $}}
+ ; NOLIMIT-NEXT: [[PHI2:%[0-9]+]]:gr32 = PHI [[MOV32rm]], %bb.2, [[SHR32ri2]], %bb.3, [[SHR32ri4]], %bb.4, [[SHR32ri6]], %bb.5
+ ; NOLIMIT-NEXT: [[MOV32rm6:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
+ ; NOLIMIT-NEXT: [[SHR32ri9:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm6]], 2, implicit-def dead $eflags
+ ; NOLIMIT-NEXT: JMP_1 %bb.13
+ ; NOLIMIT-NEXT: {{ $}}
+ ; NOLIMIT-NEXT: bb.12 (%ir-block.28):
+ ; NOLIMIT-NEXT: successors: %bb.13(0x80000000)
+ ; NOLIMIT-NEXT: {{ $}}
+ ; NOLIMIT-NEXT: [[PHI3:%[0-9]+]]:gr32 = PHI [[MOV32rm]], %bb.2, [[SHR32ri2]], %bb.3, [[SHR32ri4]], %bb.4, [[SHR32ri6]], %bb.5
+ ; NOLIMIT-NEXT: [[MOV32rm7:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
+ ; NOLIMIT-NEXT: [[SHR32ri10:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm7]], 6, implicit-def dead $eflags
+ ; NOLIMIT-NEXT: {{ $}}
+ ; NOLIMIT-NEXT: bb.13 (%ir-block.31):
+ ; NOLIMIT-NEXT: [[PHI4:%[0-9]+]]:gr32 = PHI [[PHI]], %bb.9, [[PHI1]], %bb.10, [[PHI2]], %bb.11, [[PHI3]], %bb.12
+ ; NOLIMIT-NEXT: [[PHI5:%[0-9]+]]:gr32 = PHI [[SHR32ri10]], %bb.12, [[SHR32ri9]], %bb.11, [[SHR32ri8]], %bb.10, [[MOV32rm4]], %bb.9
+ ; NOLIMIT-NEXT: [[OR32rr:%[0-9]+]]:gr32 = OR32rr [[PHI5]], [[PHI4]], implicit-def dead $eflags
+ ; NOLIMIT-NEXT: $eax = COPY [[OR32rr]]
+ ; NOLIMIT-NEXT: RET 0, $eax
+ bb.0 (%ir-block.2):
+ successors: %bb.12(0x80000000)
+ liveins: $rdi, $esi
+
+ %11:gr32 = COPY $esi
+ %10:gr64 = COPY $rdi
+ %13:gr32 = SHR32ri %11, 1, implicit-def dead $eflags
+ %14:gr32 = AND32ri %13, 7, implicit-def dead $eflags
+ %12:gr64_nosp = SUBREG_TO_REG 0, killed %14, %subreg.sub_32bit
+
+ bb.12 (%ir-block.2):
+ successors: %bb.1(0x20000000), %bb.2(0x20000000), %bb.3(0x20000000), %bb.4(0x20000000)
+
+ JMP64m $noreg, 8, %12, %jump-table.0, $noreg :: (load (s64) from jump-table)
+
+ bb.1 (%ir-block.5):
+ successors: %bb.6(0x80000000)
+
+ %0:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
+ JMP_1 %bb.6
+
+ bb.2 (%ir-block.7):
+ successors: %bb.6(0x80000000)
+
+ %17:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
+ %1:gr32 = SHR32ri %17, 1, implicit-def dead $eflags
+ JMP_1 %bb.6
+
+ bb.3 (%ir-block.10):
+ successors: %bb.6(0x80000000)
+
+ %16:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
+ %2:gr32 = SHR32ri %16, 2, implicit-def dead $eflags
+ JMP_1 %bb.6
+
+ bb.4 (%ir-block.13):
+ successors: %bb.6(0x80000000)
+
+ %15:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
+ %3:gr32 = SHR32ri %15, 3, implicit-def dead $eflags
+ JMP_1 %bb.6
+
+ bb.5.default.unreachable2:
+ successors:
+
+
+ bb.6 (%ir-block.16):
+ successors: %bb.13(0x80000000)
+
+ %4:gr32 = PHI %3, %bb.4, %2, %bb.3, %1, %bb.2, %0, %bb.1
+ %19:gr32 = SHR32ri %11, 2, implicit-def dead $eflags
+ %20:gr32 = AND32ri %19, 7, implicit-def dead $eflags
+ %18:gr64_nosp = SUBREG_TO_REG 0, killed %20, %subreg.sub_32bit
+
+ bb.13 (%ir-block.16):
+ successors: %bb.7(0x20000000), %bb.8(0x20000000), %bb.9(0x20000000), %bb.10(0x20000000)
+
+ JMP64m $noreg, 8, %18, %jump-table.1, $noreg :: (load (s64) from jump-table)
+
+ bb.7 (%ir-block.20):
+ successors: %bb.11(0x80000000)
+
+ %5:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
+ JMP_1 %bb.11
+
+ bb.8 (%ir-block.22):
+ successors: %bb.11(0x80000000)
+
+ %23:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
+ %6:gr32 = SHR32ri %23, 1, implicit-def dead $eflags
+ JMP_1 %bb.11
+
+ bb.9 (%ir-block.25):
+ successors: %bb.11(0x80000000)
+
+ %22:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
+ %7:gr32 = SHR32ri %22, 2, implicit-def dead $eflags
+ JMP_1 %bb.11
+
+ bb.10 (%ir-block.28):
+ successors: %bb.11(0x80000000)
+
+ %21:gr32 = MOV32rm %10, 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
+ %8:gr32 = SHR32ri %21, 6, implicit-def dead $eflags
+
+ bb.11 (%ir-block.31):
+ %9:gr32 = PHI %8, %bb.10, %7, %bb.9, %6, %bb.8, %5, %bb.7
+ %24:gr32 = OR32rr %9, %4, implicit-def dead $eflags
+ $eax = COPY %24
+ RET 0, $eax
+
+...
>From f3a1a1f833059f4afaf8bd3bb77f0cf484a60ec7 Mon Sep 17 00:00:00 2001
From: DianQK <dianqk at dianqk.net>
Date: Thu, 18 Jan 2024 21:03:13 +0800
Subject: [PATCH 2/3] [TailDuplicator] Add a limit on the size of predecessors
---
llvm/lib/CodeGen/TailDuplicator.cpp | 7 +
llvm/test/CodeGen/X86/mul-constant-result.ll | 323 ++++++++----------
.../CodeGen/X86/tail-dup-pred-size-limit.mir | 62 ++--
3 files changed, 169 insertions(+), 223 deletions(-)
diff --git a/llvm/lib/CodeGen/TailDuplicator.cpp b/llvm/lib/CodeGen/TailDuplicator.cpp
index 5ed67bd0a121ed..e76d63d3c0d66f 100644
--- a/llvm/lib/CodeGen/TailDuplicator.cpp
+++ b/llvm/lib/CodeGen/TailDuplicator.cpp
@@ -76,6 +76,11 @@ static cl::opt<bool>
static cl::opt<unsigned> TailDupLimit("tail-dup-limit", cl::init(~0U),
cl::Hidden);
+static cl::opt<unsigned> TailDupPredSizeLimit(
+ "tail-dup-pred-size-limit",
+ cl::desc("Maximum predecessors to consider tail duplicating."), cl::init(8),
+ cl::Hidden);
+
void TailDuplicator::initMF(MachineFunction &MFin, bool PreRegAlloc,
const MachineBranchProbabilityInfo *MBPIin,
MBFIWrapper *MBFIin,
@@ -565,6 +570,8 @@ bool TailDuplicator::shouldTailDuplicate(bool IsSimple,
if (TailBB.isSuccessor(&TailBB))
return false;
+ if (TailDupPredSizeLimit < TailBB.pred_size())
+ return false;
// Set the limit on the cost to duplicate. When optimizing for size,
// duplicate only one, because one branch instruction can be eliminated to
// compensate for the duplication.
diff --git a/llvm/test/CodeGen/X86/mul-constant-result.ll b/llvm/test/CodeGen/X86/mul-constant-result.ll
index 1f9e7a93ad0b90..73c764a3f53da1 100644
--- a/llvm/test/CodeGen/X86/mul-constant-result.ll
+++ b/llvm/test/CodeGen/X86/mul-constant-result.ll
@@ -28,162 +28,132 @@ define i32 @mult(i32, i32) local_unnamed_addr #0 {
; X86-NEXT: .LBB0_4:
; X86-NEXT: decl %ecx
; X86-NEXT: cmpl $31, %ecx
-; X86-NEXT: ja .LBB0_35
+; X86-NEXT: ja .LBB0_31
; X86-NEXT: # %bb.5:
; X86-NEXT: jmpl *.LJTI0_0(,%ecx,4)
; X86-NEXT: .LBB0_6:
; X86-NEXT: addl %eax, %eax
-; X86-NEXT: popl %esi
-; X86-NEXT: .cfi_def_cfa_offset 4
-; X86-NEXT: retl
+; X86-NEXT: jmp .LBB0_40
; X86-NEXT: .LBB0_7:
-; X86-NEXT: .cfi_def_cfa_offset 8
; X86-NEXT: leal (%eax,%eax,8), %ecx
; X86-NEXT: leal (%ecx,%ecx,2), %ecx
-; X86-NEXT: jmp .LBB0_9
+; X86-NEXT: addl %ecx, %eax
+; X86-NEXT: jmp .LBB0_40
; X86-NEXT: .LBB0_8:
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: shll $4, %ecx
-; X86-NEXT: jmp .LBB0_9
-; X86-NEXT: .LBB0_10:
+; X86-NEXT: addl %ecx, %eax
+; X86-NEXT: jmp .LBB0_40
+; X86-NEXT: .LBB0_9:
; X86-NEXT: leal (%eax,%eax,4), %eax
-; X86-NEXT: jmp .LBB0_18
-; X86-NEXT: .LBB0_11:
+; X86-NEXT: jmp .LBB0_39
+; X86-NEXT: .LBB0_10:
; X86-NEXT: shll $2, %eax
-; X86-NEXT: jmp .LBB0_18
-; X86-NEXT: .LBB0_13:
+; X86-NEXT: jmp .LBB0_39
+; X86-NEXT: .LBB0_11:
+; X86-NEXT: leal (%eax,%eax,4), %eax
+; X86-NEXT: jmp .LBB0_40
+; X86-NEXT: .LBB0_12:
; X86-NEXT: leal (%eax,%eax,2), %ecx
-; X86-NEXT: jmp .LBB0_14
-; X86-NEXT: .LBB0_15:
+; X86-NEXT: leal (%eax,%ecx,4), %eax
+; X86-NEXT: jmp .LBB0_40
+; X86-NEXT: .LBB0_13:
; X86-NEXT: addl %eax, %eax
-; X86-NEXT: jmp .LBB0_12
-; X86-NEXT: .LBB0_16:
+; X86-NEXT: leal (%eax,%eax,4), %eax
+; X86-NEXT: jmp .LBB0_40
+; X86-NEXT: .LBB0_14:
; X86-NEXT: leal (%eax,%eax,4), %ecx
; X86-NEXT: leal (%ecx,%ecx,4), %ecx
-; X86-NEXT: jmp .LBB0_9
-; X86-NEXT: .LBB0_17:
+; X86-NEXT: addl %ecx, %eax
+; X86-NEXT: jmp .LBB0_40
+; X86-NEXT: .LBB0_15:
; X86-NEXT: leal (%eax,%eax,4), %eax
-; X86-NEXT: jmp .LBB0_12
-; X86-NEXT: .LBB0_19:
+; X86-NEXT: leal (%eax,%eax,4), %eax
+; X86-NEXT: jmp .LBB0_40
+; X86-NEXT: .LBB0_17:
; X86-NEXT: shll $4, %eax
-; X86-NEXT: popl %esi
-; X86-NEXT: .cfi_def_cfa_offset 4
-; X86-NEXT: retl
-; X86-NEXT: .LBB0_20:
-; X86-NEXT: .cfi_def_cfa_offset 8
+; X86-NEXT: jmp .LBB0_40
+; X86-NEXT: .LBB0_18:
; X86-NEXT: shll $2, %eax
-; X86-NEXT: popl %esi
-; X86-NEXT: .cfi_def_cfa_offset 4
-; X86-NEXT: retl
-; X86-NEXT: .LBB0_21:
-; X86-NEXT: .cfi_def_cfa_offset 8
+; X86-NEXT: jmp .LBB0_40
+; X86-NEXT: .LBB0_19:
; X86-NEXT: shll $3, %eax
-; X86-NEXT: popl %esi
-; X86-NEXT: .cfi_def_cfa_offset 4
-; X86-NEXT: retl
-; X86-NEXT: .LBB0_22:
-; X86-NEXT: .cfi_def_cfa_offset 8
+; X86-NEXT: jmp .LBB0_40
+; X86-NEXT: .LBB0_20:
; X86-NEXT: shll $5, %eax
-; X86-NEXT: popl %esi
-; X86-NEXT: .cfi_def_cfa_offset 4
-; X86-NEXT: retl
-; X86-NEXT: .LBB0_23:
-; X86-NEXT: .cfi_def_cfa_offset 8
+; X86-NEXT: jmp .LBB0_40
+; X86-NEXT: .LBB0_21:
; X86-NEXT: addl %eax, %eax
-; X86-NEXT: .LBB0_33:
; X86-NEXT: leal (%eax,%eax,8), %eax
-; X86-NEXT: popl %esi
-; X86-NEXT: .cfi_def_cfa_offset 4
-; X86-NEXT: retl
-; X86-NEXT: .LBB0_24:
-; X86-NEXT: .cfi_def_cfa_offset 8
+; X86-NEXT: jmp .LBB0_40
+; X86-NEXT: .LBB0_22:
; X86-NEXT: leal (%eax,%eax,4), %ecx
-; X86-NEXT: .LBB0_14:
; X86-NEXT: leal (%eax,%ecx,4), %eax
-; X86-NEXT: popl %esi
-; X86-NEXT: .cfi_def_cfa_offset 4
-; X86-NEXT: retl
-; X86-NEXT: .LBB0_25:
-; X86-NEXT: .cfi_def_cfa_offset 8
+; X86-NEXT: jmp .LBB0_40
+; X86-NEXT: .LBB0_23:
; X86-NEXT: addl %eax, %eax
-; X86-NEXT: jmp .LBB0_18
-; X86-NEXT: .LBB0_26:
+; X86-NEXT: jmp .LBB0_39
+; X86-NEXT: .LBB0_24:
; X86-NEXT: leal (%eax,%eax,4), %ecx
; X86-NEXT: leal (%eax,%ecx,4), %ecx
-; X86-NEXT: jmp .LBB0_9
-; X86-NEXT: .LBB0_27:
+; X86-NEXT: addl %ecx, %eax
+; X86-NEXT: jmp .LBB0_40
+; X86-NEXT: .LBB0_25:
; X86-NEXT: leal (%eax,%eax), %ecx
; X86-NEXT: shll $4, %eax
-; X86-NEXT: jmp .LBB0_28
-; X86-NEXT: .LBB0_29:
+; X86-NEXT: subl %ecx, %eax
+; X86-NEXT: jmp .LBB0_40
+; X86-NEXT: .LBB0_26:
; X86-NEXT: leal (,%eax,8), %ecx
-; X86-NEXT: jmp .LBB0_38
-; X86-NEXT: .LBB0_30:
+; X86-NEXT: jmp .LBB0_33
+; X86-NEXT: .LBB0_27:
; X86-NEXT: leal (%eax,%eax,8), %ecx
-; X86-NEXT: jmp .LBB0_32
-; X86-NEXT: .LBB0_31:
+; X86-NEXT: leal (%eax,%ecx,2), %eax
+; X86-NEXT: jmp .LBB0_40
+; X86-NEXT: .LBB0_28:
; X86-NEXT: leal (%eax,%eax,4), %ecx
-; X86-NEXT: .LBB0_32:
; X86-NEXT: leal (%eax,%ecx,2), %eax
-; X86-NEXT: popl %esi
-; X86-NEXT: .cfi_def_cfa_offset 4
-; X86-NEXT: retl
-; X86-NEXT: .LBB0_34:
-; X86-NEXT: .cfi_def_cfa_offset 8
+; X86-NEXT: jmp .LBB0_40
+; X86-NEXT: .LBB0_29:
+; X86-NEXT: leal (%eax,%eax,8), %eax
+; X86-NEXT: jmp .LBB0_40
+; X86-NEXT: .LBB0_30:
; X86-NEXT: movl %eax, %ecx
; X86-NEXT: shll $5, %ecx
-; X86-NEXT: jmp .LBB0_38
-; X86-NEXT: .LBB0_35:
+; X86-NEXT: jmp .LBB0_33
+; X86-NEXT: .LBB0_31:
; X86-NEXT: xorl %eax, %eax
-; X86-NEXT: .LBB0_36:
-; X86-NEXT: popl %esi
-; X86-NEXT: .cfi_def_cfa_offset 4
-; X86-NEXT: retl
-; X86-NEXT: .LBB0_37:
-; X86-NEXT: .cfi_def_cfa_offset 8
+; X86-NEXT: jmp .LBB0_40
+; X86-NEXT: .LBB0_32:
; X86-NEXT: leal (%eax,%eax,2), %ecx
; X86-NEXT: shll $3, %ecx
-; X86-NEXT: .LBB0_38:
+; X86-NEXT: .LBB0_33:
; X86-NEXT: subl %eax, %ecx
; X86-NEXT: movl %ecx, %eax
-; X86-NEXT: popl %esi
-; X86-NEXT: .cfi_def_cfa_offset 4
-; X86-NEXT: retl
-; X86-NEXT: .LBB0_39:
-; X86-NEXT: .cfi_def_cfa_offset 8
+; X86-NEXT: jmp .LBB0_40
+; X86-NEXT: .LBB0_34:
; X86-NEXT: shll $2, %eax
-; X86-NEXT: .LBB0_12:
; X86-NEXT: leal (%eax,%eax,4), %eax
-; X86-NEXT: popl %esi
-; X86-NEXT: .cfi_def_cfa_offset 4
-; X86-NEXT: retl
-; X86-NEXT: .LBB0_40:
-; X86-NEXT: .cfi_def_cfa_offset 8
+; X86-NEXT: jmp .LBB0_40
+; X86-NEXT: .LBB0_35:
; X86-NEXT: shll $3, %eax
-; X86-NEXT: jmp .LBB0_18
-; X86-NEXT: .LBB0_41:
+; X86-NEXT: jmp .LBB0_39
+; X86-NEXT: .LBB0_36:
; X86-NEXT: leal (%eax,%eax,8), %ecx
; X86-NEXT: leal (%ecx,%ecx,2), %ecx
; X86-NEXT: addl %eax, %eax
-; X86-NEXT: .LBB0_9:
; X86-NEXT: addl %ecx, %eax
-; X86-NEXT: popl %esi
-; X86-NEXT: .cfi_def_cfa_offset 4
-; X86-NEXT: retl
-; X86-NEXT: .LBB0_42:
-; X86-NEXT: .cfi_def_cfa_offset 8
+; X86-NEXT: jmp .LBB0_40
+; X86-NEXT: .LBB0_37:
; X86-NEXT: leal (%eax,%eax), %ecx
; X86-NEXT: shll $5, %eax
-; X86-NEXT: .LBB0_28:
; X86-NEXT: subl %ecx, %eax
-; X86-NEXT: popl %esi
-; X86-NEXT: .cfi_def_cfa_offset 4
-; X86-NEXT: retl
-; X86-NEXT: .LBB0_43:
-; X86-NEXT: .cfi_def_cfa_offset 8
+; X86-NEXT: jmp .LBB0_40
+; X86-NEXT: .LBB0_38:
; X86-NEXT: leal (%eax,%eax,8), %eax
-; X86-NEXT: .LBB0_18:
+; X86-NEXT: .LBB0_39:
; X86-NEXT: leal (%eax,%eax,2), %eax
+; X86-NEXT: .LBB0_40:
; X86-NEXT: popl %esi
; X86-NEXT: .cfi_def_cfa_offset 4
; X86-NEXT: retl
@@ -199,154 +169,131 @@ define i32 @mult(i32, i32) local_unnamed_addr #0 {
; X64-HSW-NEXT: cmovel %ecx, %eax
; X64-HSW-NEXT: decl %edi
; X64-HSW-NEXT: cmpl $31, %edi
-; X64-HSW-NEXT: ja .LBB0_31
+; X64-HSW-NEXT: ja .LBB0_28
; X64-HSW-NEXT: # %bb.1:
; X64-HSW-NEXT: jmpq *.LJTI0_0(,%rdi,8)
; X64-HSW-NEXT: .LBB0_2:
; X64-HSW-NEXT: addl %eax, %eax
-; X64-HSW-NEXT: # kill: def $eax killed $eax killed $rax
-; X64-HSW-NEXT: retq
+; X64-HSW-NEXT: jmp .LBB0_37
; X64-HSW-NEXT: .LBB0_3:
; X64-HSW-NEXT: leal (%rax,%rax,8), %ecx
; X64-HSW-NEXT: leal (%rcx,%rcx,2), %ecx
-; X64-HSW-NEXT: jmp .LBB0_22
+; X64-HSW-NEXT: jmp .LBB0_21
; X64-HSW-NEXT: .LBB0_4:
; X64-HSW-NEXT: movl %eax, %ecx
; X64-HSW-NEXT: shll $4, %ecx
-; X64-HSW-NEXT: jmp .LBB0_22
+; X64-HSW-NEXT: jmp .LBB0_21
; X64-HSW-NEXT: .LBB0_5:
; X64-HSW-NEXT: leal (%rax,%rax,4), %eax
-; X64-HSW-NEXT: .LBB0_13:
-; X64-HSW-NEXT: leal (%rax,%rax,2), %eax
-; X64-HSW-NEXT: # kill: def $eax killed $eax killed $rax
-; X64-HSW-NEXT: retq
+; X64-HSW-NEXT: jmp .LBB0_36
; X64-HSW-NEXT: .LBB0_6:
; X64-HSW-NEXT: shll $2, %eax
-; X64-HSW-NEXT: leal (%rax,%rax,2), %eax
-; X64-HSW-NEXT: # kill: def $eax killed $eax killed $rax
-; X64-HSW-NEXT: retq
+; X64-HSW-NEXT: jmp .LBB0_36
+; X64-HSW-NEXT: .LBB0_7:
+; X64-HSW-NEXT: leal (%rax,%rax,4), %eax
+; X64-HSW-NEXT: jmp .LBB0_37
; X64-HSW-NEXT: .LBB0_8:
; X64-HSW-NEXT: leal (%rax,%rax,2), %ecx
; X64-HSW-NEXT: leal (%rax,%rcx,4), %eax
-; X64-HSW-NEXT: # kill: def $eax killed $eax killed $rax
-; X64-HSW-NEXT: retq
-; X64-HSW-NEXT: .LBB0_10:
+; X64-HSW-NEXT: jmp .LBB0_37
+; X64-HSW-NEXT: .LBB0_9:
; X64-HSW-NEXT: addl %eax, %eax
-; X64-HSW-NEXT: .LBB0_7:
; X64-HSW-NEXT: leal (%rax,%rax,4), %eax
-; X64-HSW-NEXT: # kill: def $eax killed $eax killed $rax
-; X64-HSW-NEXT: retq
-; X64-HSW-NEXT: .LBB0_11:
+; X64-HSW-NEXT: jmp .LBB0_37
+; X64-HSW-NEXT: .LBB0_10:
; X64-HSW-NEXT: leal (%rax,%rax,4), %ecx
; X64-HSW-NEXT: leal (%rcx,%rcx,4), %ecx
-; X64-HSW-NEXT: jmp .LBB0_22
-; X64-HSW-NEXT: .LBB0_12:
+; X64-HSW-NEXT: jmp .LBB0_21
+; X64-HSW-NEXT: .LBB0_11:
; X64-HSW-NEXT: leal (%rax,%rax,4), %eax
; X64-HSW-NEXT: leal (%rax,%rax,4), %eax
-; X64-HSW-NEXT: # kill: def $eax killed $eax killed $rax
-; X64-HSW-NEXT: retq
-; X64-HSW-NEXT: .LBB0_14:
+; X64-HSW-NEXT: jmp .LBB0_37
+; X64-HSW-NEXT: .LBB0_13:
; X64-HSW-NEXT: shll $4, %eax
-; X64-HSW-NEXT: # kill: def $eax killed $eax killed $rax
-; X64-HSW-NEXT: retq
-; X64-HSW-NEXT: .LBB0_15:
+; X64-HSW-NEXT: jmp .LBB0_37
+; X64-HSW-NEXT: .LBB0_14:
; X64-HSW-NEXT: shll $2, %eax
-; X64-HSW-NEXT: # kill: def $eax killed $eax killed $rax
-; X64-HSW-NEXT: retq
-; X64-HSW-NEXT: .LBB0_16:
+; X64-HSW-NEXT: jmp .LBB0_37
+; X64-HSW-NEXT: .LBB0_15:
; X64-HSW-NEXT: shll $3, %eax
-; X64-HSW-NEXT: # kill: def $eax killed $eax killed $rax
-; X64-HSW-NEXT: retq
-; X64-HSW-NEXT: .LBB0_17:
+; X64-HSW-NEXT: jmp .LBB0_37
+; X64-HSW-NEXT: .LBB0_16:
; X64-HSW-NEXT: shll $5, %eax
-; X64-HSW-NEXT: # kill: def $eax killed $eax killed $rax
-; X64-HSW-NEXT: retq
-; X64-HSW-NEXT: .LBB0_18:
+; X64-HSW-NEXT: jmp .LBB0_37
+; X64-HSW-NEXT: .LBB0_17:
; X64-HSW-NEXT: addl %eax, %eax
-; X64-HSW-NEXT: .LBB0_29:
; X64-HSW-NEXT: leal (%rax,%rax,8), %eax
-; X64-HSW-NEXT: # kill: def $eax killed $eax killed $rax
-; X64-HSW-NEXT: retq
-; X64-HSW-NEXT: .LBB0_19:
+; X64-HSW-NEXT: jmp .LBB0_37
+; X64-HSW-NEXT: .LBB0_18:
; X64-HSW-NEXT: leal (%rax,%rax,4), %ecx
; X64-HSW-NEXT: leal (%rax,%rcx,4), %eax
-; X64-HSW-NEXT: # kill: def $eax killed $eax killed $rax
-; X64-HSW-NEXT: retq
-; X64-HSW-NEXT: .LBB0_20:
+; X64-HSW-NEXT: jmp .LBB0_37
+; X64-HSW-NEXT: .LBB0_19:
; X64-HSW-NEXT: addl %eax, %eax
-; X64-HSW-NEXT: leal (%rax,%rax,2), %eax
-; X64-HSW-NEXT: # kill: def $eax killed $eax killed $rax
-; X64-HSW-NEXT: retq
-; X64-HSW-NEXT: .LBB0_21:
+; X64-HSW-NEXT: jmp .LBB0_36
+; X64-HSW-NEXT: .LBB0_20:
; X64-HSW-NEXT: leal (%rax,%rax,4), %ecx
; X64-HSW-NEXT: leal (%rax,%rcx,4), %ecx
-; X64-HSW-NEXT: .LBB0_22:
+; X64-HSW-NEXT: .LBB0_21:
; X64-HSW-NEXT: addl %eax, %ecx
; X64-HSW-NEXT: movl %ecx, %eax
-; X64-HSW-NEXT: # kill: def $eax killed $eax killed $rax
-; X64-HSW-NEXT: retq
-; X64-HSW-NEXT: .LBB0_23:
+; X64-HSW-NEXT: jmp .LBB0_37
+; X64-HSW-NEXT: .LBB0_22:
; X64-HSW-NEXT: leal (%rax,%rax), %ecx
; X64-HSW-NEXT: shll $4, %eax
; X64-HSW-NEXT: subl %ecx, %eax
-; X64-HSW-NEXT: # kill: def $eax killed $eax killed $rax
-; X64-HSW-NEXT: retq
-; X64-HSW-NEXT: .LBB0_25:
+; X64-HSW-NEXT: jmp .LBB0_37
+; X64-HSW-NEXT: .LBB0_23:
; X64-HSW-NEXT: leal (,%rax,8), %ecx
-; X64-HSW-NEXT: jmp .LBB0_34
-; X64-HSW-NEXT: .LBB0_26:
+; X64-HSW-NEXT: jmp .LBB0_30
+; X64-HSW-NEXT: .LBB0_24:
; X64-HSW-NEXT: leal (%rax,%rax,8), %ecx
; X64-HSW-NEXT: leal (%rax,%rcx,2), %eax
-; X64-HSW-NEXT: # kill: def $eax killed $eax killed $rax
-; X64-HSW-NEXT: retq
-; X64-HSW-NEXT: .LBB0_27:
+; X64-HSW-NEXT: jmp .LBB0_37
+; X64-HSW-NEXT: .LBB0_25:
; X64-HSW-NEXT: leal (%rax,%rax,4), %ecx
; X64-HSW-NEXT: leal (%rax,%rcx,2), %eax
-; X64-HSW-NEXT: # kill: def $eax killed $eax killed $rax
-; X64-HSW-NEXT: retq
-; X64-HSW-NEXT: .LBB0_30:
+; X64-HSW-NEXT: jmp .LBB0_37
+; X64-HSW-NEXT: .LBB0_26:
+; X64-HSW-NEXT: leal (%rax,%rax,8), %eax
+; X64-HSW-NEXT: jmp .LBB0_37
+; X64-HSW-NEXT: .LBB0_27:
; X64-HSW-NEXT: movl %eax, %ecx
; X64-HSW-NEXT: shll $5, %ecx
-; X64-HSW-NEXT: jmp .LBB0_34
-; X64-HSW-NEXT: .LBB0_31:
+; X64-HSW-NEXT: jmp .LBB0_30
+; X64-HSW-NEXT: .LBB0_28:
; X64-HSW-NEXT: xorl %eax, %eax
-; X64-HSW-NEXT: .LBB0_32:
-; X64-HSW-NEXT: # kill: def $eax killed $eax killed $rax
-; X64-HSW-NEXT: retq
-; X64-HSW-NEXT: .LBB0_33:
+; X64-HSW-NEXT: jmp .LBB0_37
+; X64-HSW-NEXT: .LBB0_29:
; X64-HSW-NEXT: leal (%rax,%rax,2), %ecx
; X64-HSW-NEXT: shll $3, %ecx
-; X64-HSW-NEXT: .LBB0_34:
+; X64-HSW-NEXT: .LBB0_30:
; X64-HSW-NEXT: subl %eax, %ecx
; X64-HSW-NEXT: movl %ecx, %eax
-; X64-HSW-NEXT: # kill: def $eax killed $eax killed $rax
-; X64-HSW-NEXT: retq
-; X64-HSW-NEXT: .LBB0_36:
+; X64-HSW-NEXT: jmp .LBB0_37
+; X64-HSW-NEXT: .LBB0_31:
; X64-HSW-NEXT: shll $2, %eax
; X64-HSW-NEXT: leal (%rax,%rax,4), %eax
-; X64-HSW-NEXT: # kill: def $eax killed $eax killed $rax
-; X64-HSW-NEXT: retq
-; X64-HSW-NEXT: .LBB0_37:
+; X64-HSW-NEXT: jmp .LBB0_37
+; X64-HSW-NEXT: .LBB0_32:
; X64-HSW-NEXT: shll $3, %eax
-; X64-HSW-NEXT: leal (%rax,%rax,2), %eax
-; X64-HSW-NEXT: # kill: def $eax killed $eax killed $rax
-; X64-HSW-NEXT: retq
-; X64-HSW-NEXT: .LBB0_38:
+; X64-HSW-NEXT: jmp .LBB0_36
+; X64-HSW-NEXT: .LBB0_33:
; X64-HSW-NEXT: leal (%rax,%rax,8), %ecx
; X64-HSW-NEXT: leal (%rcx,%rcx,2), %ecx
; X64-HSW-NEXT: addl %eax, %eax
; X64-HSW-NEXT: addl %ecx, %eax
-; X64-HSW-NEXT: # kill: def $eax killed $eax killed $rax
-; X64-HSW-NEXT: retq
-; X64-HSW-NEXT: .LBB0_39:
+; X64-HSW-NEXT: jmp .LBB0_37
+; X64-HSW-NEXT: .LBB0_34:
; X64-HSW-NEXT: leal (%rax,%rax), %ecx
; X64-HSW-NEXT: shll $5, %eax
; X64-HSW-NEXT: subl %ecx, %eax
-; X64-HSW-NEXT: # kill: def $eax killed $eax killed $rax
-; X64-HSW-NEXT: retq
-; X64-HSW-NEXT: .LBB0_40:
+; X64-HSW-NEXT: jmp .LBB0_37
+; X64-HSW-NEXT: .LBB0_35:
; X64-HSW-NEXT: leal (%rax,%rax,8), %eax
+; X64-HSW-NEXT: .LBB0_36:
; X64-HSW-NEXT: leal (%rax,%rax,2), %eax
+; X64-HSW-NEXT: .LBB0_37:
; X64-HSW-NEXT: # kill: def $eax killed $eax killed $rax
; X64-HSW-NEXT: retq
%3 = icmp eq i32 %1, 0
diff --git a/llvm/test/CodeGen/X86/tail-dup-pred-size-limit.mir b/llvm/test/CodeGen/X86/tail-dup-pred-size-limit.mir
index 63deca7bb1d141..3afe3ebcb8a078 100644
--- a/llvm/test/CodeGen/X86/tail-dup-pred-size-limit.mir
+++ b/llvm/test/CodeGen/X86/tail-dup-pred-size-limit.mir
@@ -1,6 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
-# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass=early-tailduplication %s -o - | FileCheck %s -check-prefix=LIMIT
-# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass=early-tailduplication %s -o - | FileCheck %s -check-prefix=NOLIMIT
+# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass=early-tailduplication -tail-dup-pred-size-limit=3 %s -o - | FileCheck %s -check-prefix=LIMIT
+# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass=early-tailduplication -tail-dup-pred-size-limit=4 %s -o - | FileCheck %s -check-prefix=NOLIMIT
--- |
source_filename = "tail-dup-pred-size-limit.ll"
@@ -172,82 +172,74 @@ body: |
; LIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG]], %jump-table.0, $noreg :: (load (s64) from jump-table)
; LIMIT-NEXT: {{ $}}
; LIMIT-NEXT: bb.2 (%ir-block.5):
- ; LIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
+ ; LIMIT-NEXT: successors: %bb.7(0x80000000)
; LIMIT-NEXT: {{ $}}
; LIMIT-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
- ; LIMIT-NEXT: [[SHR32ri1:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags
- ; LIMIT-NEXT: [[AND32ri1:%[0-9]+]]:gr32 = AND32ri [[SHR32ri1]], 7, implicit-def dead $eflags
- ; LIMIT-NEXT: [[SUBREG_TO_REG1:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri1]], %subreg.sub_32bit
- ; LIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG1]], %jump-table.1, $noreg :: (load (s64) from jump-table)
+ ; LIMIT-NEXT: JMP_1 %bb.7
; LIMIT-NEXT: {{ $}}
; LIMIT-NEXT: bb.3 (%ir-block.7):
- ; LIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
+ ; LIMIT-NEXT: successors: %bb.7(0x80000000)
; LIMIT-NEXT: {{ $}}
; LIMIT-NEXT: [[MOV32rm1:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
- ; LIMIT-NEXT: [[SHR32ri2:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm1]], 1, implicit-def dead $eflags
- ; LIMIT-NEXT: [[SHR32ri3:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags
- ; LIMIT-NEXT: [[AND32ri2:%[0-9]+]]:gr32 = AND32ri [[SHR32ri3]], 7, implicit-def dead $eflags
- ; LIMIT-NEXT: [[SUBREG_TO_REG2:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri2]], %subreg.sub_32bit
- ; LIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG2]], %jump-table.1, $noreg :: (load (s64) from jump-table)
+ ; LIMIT-NEXT: [[SHR32ri1:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm1]], 1, implicit-def dead $eflags
+ ; LIMIT-NEXT: JMP_1 %bb.7
; LIMIT-NEXT: {{ $}}
; LIMIT-NEXT: bb.4 (%ir-block.10):
- ; LIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
+ ; LIMIT-NEXT: successors: %bb.7(0x80000000)
; LIMIT-NEXT: {{ $}}
; LIMIT-NEXT: [[MOV32rm2:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
- ; LIMIT-NEXT: [[SHR32ri4:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm2]], 2, implicit-def dead $eflags
- ; LIMIT-NEXT: [[SHR32ri5:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags
- ; LIMIT-NEXT: [[AND32ri3:%[0-9]+]]:gr32 = AND32ri [[SHR32ri5]], 7, implicit-def dead $eflags
- ; LIMIT-NEXT: [[SUBREG_TO_REG3:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri3]], %subreg.sub_32bit
- ; LIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG3]], %jump-table.1, $noreg :: (load (s64) from jump-table)
+ ; LIMIT-NEXT: [[SHR32ri2:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm2]], 2, implicit-def dead $eflags
+ ; LIMIT-NEXT: JMP_1 %bb.7
; LIMIT-NEXT: {{ $}}
; LIMIT-NEXT: bb.5 (%ir-block.13):
- ; LIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
+ ; LIMIT-NEXT: successors: %bb.7(0x80000000)
; LIMIT-NEXT: {{ $}}
; LIMIT-NEXT: [[MOV32rm3:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
- ; LIMIT-NEXT: [[SHR32ri6:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm3]], 3, implicit-def dead $eflags
- ; LIMIT-NEXT: [[SHR32ri7:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags
- ; LIMIT-NEXT: [[AND32ri4:%[0-9]+]]:gr32 = AND32ri [[SHR32ri7]], 7, implicit-def dead $eflags
- ; LIMIT-NEXT: [[SUBREG_TO_REG4:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, [[AND32ri4]], %subreg.sub_32bit
- ; LIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG4]], %jump-table.1, $noreg :: (load (s64) from jump-table)
+ ; LIMIT-NEXT: [[SHR32ri3:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm3]], 3, implicit-def dead $eflags
+ ; LIMIT-NEXT: JMP_1 %bb.7
; LIMIT-NEXT: {{ $}}
; LIMIT-NEXT: bb.6.default.unreachable2:
; LIMIT-NEXT: successors:
; LIMIT-NEXT: {{ $}}
; LIMIT-NEXT: {{ $}}
+ ; LIMIT-NEXT: bb.7 (%ir-block.16):
+ ; LIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
+ ; LIMIT-NEXT: {{ $}}
+ ; LIMIT-NEXT: [[PHI:%[0-9]+]]:gr32 = PHI [[SHR32ri3]], %bb.5, [[SHR32ri2]], %bb.4, [[SHR32ri1]], %bb.3, [[MOV32rm]], %bb.2
+ ; LIMIT-NEXT: [[SHR32ri4:%[0-9]+]]:gr32 = SHR32ri [[COPY]], 2, implicit-def dead $eflags
+ ; LIMIT-NEXT: [[AND32ri1:%[0-9]+]]:gr32 = AND32ri [[SHR32ri4]], 7, implicit-def dead $eflags
+ ; LIMIT-NEXT: [[SUBREG_TO_REG1:%[0-9]+]]:gr64_nosp = SUBREG_TO_REG 0, killed [[AND32ri1]], %subreg.sub_32bit
+ ; LIMIT-NEXT: JMP64m $noreg, 8, [[SUBREG_TO_REG1]], %jump-table.1, $noreg :: (load (s64) from jump-table)
+ ; LIMIT-NEXT: {{ $}}
; LIMIT-NEXT: bb.9 (%ir-block.20):
; LIMIT-NEXT: successors: %bb.13(0x80000000)
; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[PHI:%[0-9]+]]:gr32 = PHI [[MOV32rm]], %bb.2, [[SHR32ri2]], %bb.3, [[SHR32ri4]], %bb.4, [[SHR32ri6]], %bb.5
; LIMIT-NEXT: [[MOV32rm4:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
; LIMIT-NEXT: JMP_1 %bb.13
; LIMIT-NEXT: {{ $}}
; LIMIT-NEXT: bb.10 (%ir-block.22):
; LIMIT-NEXT: successors: %bb.13(0x80000000)
; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[PHI1:%[0-9]+]]:gr32 = PHI [[MOV32rm]], %bb.2, [[SHR32ri2]], %bb.3, [[SHR32ri4]], %bb.4, [[SHR32ri6]], %bb.5
; LIMIT-NEXT: [[MOV32rm5:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
- ; LIMIT-NEXT: [[SHR32ri8:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm5]], 1, implicit-def dead $eflags
+ ; LIMIT-NEXT: [[SHR32ri5:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm5]], 1, implicit-def dead $eflags
; LIMIT-NEXT: JMP_1 %bb.13
; LIMIT-NEXT: {{ $}}
; LIMIT-NEXT: bb.11 (%ir-block.25):
; LIMIT-NEXT: successors: %bb.13(0x80000000)
; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[PHI2:%[0-9]+]]:gr32 = PHI [[MOV32rm]], %bb.2, [[SHR32ri2]], %bb.3, [[SHR32ri4]], %bb.4, [[SHR32ri6]], %bb.5
; LIMIT-NEXT: [[MOV32rm6:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
- ; LIMIT-NEXT: [[SHR32ri9:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm6]], 2, implicit-def dead $eflags
+ ; LIMIT-NEXT: [[SHR32ri6:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm6]], 2, implicit-def dead $eflags
; LIMIT-NEXT: JMP_1 %bb.13
; LIMIT-NEXT: {{ $}}
; LIMIT-NEXT: bb.12 (%ir-block.28):
; LIMIT-NEXT: successors: %bb.13(0x80000000)
; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: [[PHI3:%[0-9]+]]:gr32 = PHI [[MOV32rm]], %bb.2, [[SHR32ri2]], %bb.3, [[SHR32ri4]], %bb.4, [[SHR32ri6]], %bb.5
; LIMIT-NEXT: [[MOV32rm7:%[0-9]+]]:gr32 = MOV32rm [[COPY1]], 1, $noreg, 0, $noreg :: (load (s32) from %ir.0)
- ; LIMIT-NEXT: [[SHR32ri10:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm7]], 6, implicit-def dead $eflags
+ ; LIMIT-NEXT: [[SHR32ri7:%[0-9]+]]:gr32 = SHR32ri [[MOV32rm7]], 6, implicit-def dead $eflags
; LIMIT-NEXT: {{ $}}
; LIMIT-NEXT: bb.13 (%ir-block.31):
- ; LIMIT-NEXT: [[PHI4:%[0-9]+]]:gr32 = PHI [[PHI]], %bb.9, [[PHI1]], %bb.10, [[PHI2]], %bb.11, [[PHI3]], %bb.12
- ; LIMIT-NEXT: [[PHI5:%[0-9]+]]:gr32 = PHI [[SHR32ri10]], %bb.12, [[SHR32ri9]], %bb.11, [[SHR32ri8]], %bb.10, [[MOV32rm4]], %bb.9
- ; LIMIT-NEXT: [[OR32rr:%[0-9]+]]:gr32 = OR32rr [[PHI5]], [[PHI4]], implicit-def dead $eflags
+ ; LIMIT-NEXT: [[PHI1:%[0-9]+]]:gr32 = PHI [[SHR32ri7]], %bb.12, [[SHR32ri6]], %bb.11, [[SHR32ri5]], %bb.10, [[MOV32rm4]], %bb.9
+ ; LIMIT-NEXT: [[OR32rr:%[0-9]+]]:gr32 = OR32rr [[PHI1]], [[PHI]], implicit-def dead $eflags
; LIMIT-NEXT: $eax = COPY [[OR32rr]]
; LIMIT-NEXT: RET 0, $eax
;
>From 028c8c777ff815fd6f11dc50ad72675c3de688c8 Mon Sep 17 00:00:00 2001
From: DianQK <dianqk at dianqk.net>
Date: Thu, 18 Jan 2024 21:29:49 +0800
Subject: [PATCH 3/3] Remove redundant newline checking
--
RUN: at line 2: /home/dianqk/llvm/llvm-project/build/bin/llc -mtriple=x86_64-unknown-linux-gnu -stop-after=early-tailduplication -tail-dup-pred-size-limit=3 < /home/dianqk/llvm/llvm-project/llvm/test/CodeGen/X86/tail-dup-pred-size-limit.ll | /home/dianqk/llvm/llvm-project/build/bin/FileCheck /home/dianqk/llvm/llvm-project/llvm/test/CodeGen/X86/tail-dup-pred-size-limit.ll -check-prefix=LIMIT
+ /home/dianqk/llvm/llvm-project/build/bin/llc -mtriple=x86_64-unknown-linux-gnu -stop-after=early-tailduplication -tail-dup-pred-size-limit=3
+ /home/dianqk/llvm/llvm-project/build/bin/FileCheck /home/dianqk/llvm/llvm-project/llvm/test/CodeGen/X86/tail-dup-pred-size-limit.ll -check-prefix=LIMIT
/home/dianqk/llvm/llvm-project/llvm/test/CodeGen/X86/tail-dup-pred-size-limit.ll:48:16: error: LIMIT-NEXT: is not on the line after the previous match
; LIMIT-NEXT: bb.6 (%ir-block.16):
^
<stdin>:202:2: note: 'next' match was here
bb.6 (%ir-block.16):
^
<stdin>:199:14: note: previous match ended here
successors:
^
<stdin>:200:1: note: non-matching line after previous match is here
^
Input file: <stdin>
Check file: /home/dianqk/llvm/llvm-project/llvm/test/CodeGen/X86/tail-dup-pred-size-limit.ll
-dump-input=help explains the following input dump.
Input was:
<<<<<<
.
.
.
197:
198: bb.5.default.unreachable2:
199: successors:
200:
201:
202: bb.6 (%ir-block.16):
next:48 !~~~~~~~~~~~~~~~~~~~ error: match on wrong line
203: successors: %bb.7(0x20000000), %bb.8(0x20000000), %bb.9(0x20000000), %bb.10(0x20000000)
204:
205: %4:gr32 = PHI %3, %bb.4, %2, %bb.3, %1, %bb.2, %0, %bb.1
206: %19:gr32 = SHR32ri %11, 2, implicit-def dead $eflags
207: %20:gr32 = AND32ri %19, 7, implicit-def dead $eflags
.
.
.
>>>>>>
---
llvm/test/CodeGen/X86/tail-dup-pred-size-limit.mir | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/llvm/test/CodeGen/X86/tail-dup-pred-size-limit.mir b/llvm/test/CodeGen/X86/tail-dup-pred-size-limit.mir
index 3afe3ebcb8a078..c661fd627fbddb 100644
--- a/llvm/test/CodeGen/X86/tail-dup-pred-size-limit.mir
+++ b/llvm/test/CodeGen/X86/tail-dup-pred-size-limit.mir
@@ -200,9 +200,7 @@ body: |
; LIMIT-NEXT: {{ $}}
; LIMIT-NEXT: bb.6.default.unreachable2:
; LIMIT-NEXT: successors:
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: {{ $}}
- ; LIMIT-NEXT: bb.7 (%ir-block.16):
+ ; LIMIT: bb.7 (%ir-block.16):
; LIMIT-NEXT: successors: %bb.9(0x20000000), %bb.10(0x20000000), %bb.11(0x20000000), %bb.12(0x20000000)
; LIMIT-NEXT: {{ $}}
; LIMIT-NEXT: [[PHI:%[0-9]+]]:gr32 = PHI [[SHR32ri3]], %bb.5, [[SHR32ri2]], %bb.4, [[SHR32ri1]], %bb.3, [[MOV32rm]], %bb.2
@@ -296,9 +294,7 @@ body: |
; NOLIMIT-NEXT: {{ $}}
; NOLIMIT-NEXT: bb.6.default.unreachable2:
; NOLIMIT-NEXT: successors:
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: {{ $}}
- ; NOLIMIT-NEXT: bb.9 (%ir-block.20):
+ ; NOLIMIT: bb.9 (%ir-block.20):
; NOLIMIT-NEXT: successors: %bb.13(0x80000000)
; NOLIMIT-NEXT: {{ $}}
; NOLIMIT-NEXT: [[PHI:%[0-9]+]]:gr32 = PHI [[MOV32rm]], %bb.2, [[SHR32ri2]], %bb.3, [[SHR32ri4]], %bb.4, [[SHR32ri6]], %bb.5
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