[llvm] [AArch64] Add custom lowering for load <3 x i8>. (PR #78632)

[Yingchi Long via llvm-commits]

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@@ -21095,6 +21095,50 @@ static SDValue foldTruncStoreOfExt(SelectionDAG &DAG, SDNode *N) {
   return SDValue();
 }
 
+// A custom combine to lower load <3 x i8> as the more efficient sequence
+// below:
+//    ldrb wX, [x0, #2]
+//    ldrh wY, [x0]
+//    orr wX, wY, wX, lsl #16
+//    fmov s0, wX
+//
+static SDValue combineV3I8LoadExt(LoadSDNode *LD, SelectionDAG &DAG) {
+  EVT MemVT = LD->getMemoryVT();
+  if (MemVT != EVT::getVectorVT(*DAG.getContext(), MVT::i8, 3) ||
+      LD->getOriginalAlign() >= 4)
+    return SDValue();
+
+  SDLoc DL(LD);
+  SDValue Chain = LD->getChain();
+  SDValue BasePtr = LD->getBasePtr();
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inclyc wrote:

> Unfortunately I am not entirely sure what you mean here? Could. you elaborate?

I'm curious about whether or not should we consider if the `LD` is actually an *indexed* load. Is it possible that it has non UNDEF `offset` SDValue?

https://github.com/llvm/llvm-project/pull/78632