[llvm] 4482fd8 - Revert "[InstCombine] Try to fold trunc(shuffle(zext)) to just a shuffle (#78636)"
Pranav Kant via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 19 13:03:19 PST 2024
Author: Pranav Kant
Date: 2024-01-19T21:02:20Z
New Revision: 4482fd846af849f399f915accca58d1c904243ef
URL: https://github.com/llvm/llvm-project/commit/4482fd846af849f399f915accca58d1c904243ef
DIFF: https://github.com/llvm/llvm-project/commit/4482fd846af849f399f915accca58d1c904243ef.diff
LOG: Revert "[InstCombine] Try to fold trunc(shuffle(zext)) to just a shuffle (#78636)"
This reverts commit 4d11f04b20f0bd7488e19e8f178ba028412fa519.
This breaks some programs as mentioned in #78636
Added:
Modified:
llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
llvm/test/Transforms/InstCombine/logical-select-inseltpoison.ll
llvm/test/Transforms/InstCombine/logical-select.ll
Removed:
################################################################################
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
index 3470e61cd597f4..6629ca840a67c0 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
@@ -103,13 +103,6 @@ Value *InstCombinerImpl::EvaluateInDifferentType(Value *V, Type *Ty,
}
}
break;
- case Instruction::ShuffleVector: {
- Value *Op0 = EvaluateInDifferentType(I->getOperand(0), Ty, isSigned);
- Value *Op1 = EvaluateInDifferentType(I->getOperand(1), Ty, isSigned);
- Res = new ShuffleVectorInst(Op0, Op1,
- cast<ShuffleVectorInst>(I)->getShuffleMask());
- break;
- }
default:
// TODO: Can handle more cases here.
llvm_unreachable("Unreachable!");
@@ -370,9 +363,6 @@ static bool canEvaluateTruncated(Value *V, Type *Ty, InstCombinerImpl &IC,
I->getOpcode() == Instruction::FPToSI);
return Ty->getScalarSizeInBits() >= MinBitWidth;
}
- case Instruction::ShuffleVector:
- return canEvaluateTruncated(I->getOperand(0), Ty, IC, CxtI) &&
- canEvaluateTruncated(I->getOperand(1), Ty, IC, CxtI);
default:
// TODO: Can handle more cases here.
break;
diff --git a/llvm/test/Transforms/InstCombine/logical-select-inseltpoison.ll b/llvm/test/Transforms/InstCombine/logical-select-inseltpoison.ll
index b3d147621b59e5..29e2cb42e1bef4 100644
--- a/llvm/test/Transforms/InstCombine/logical-select-inseltpoison.ll
+++ b/llvm/test/Transforms/InstCombine/logical-select-inseltpoison.ll
@@ -671,8 +671,11 @@ define <4 x i32> @computesignbits_through_shuffles(<4 x float> %x, <4 x float> %
define <4 x i32> @computesignbits_through_two_input_shuffle(<4 x i32> %x, <4 x i32> %y, <4 x i1> %cond1, <4 x i1> %cond2) {
; CHECK-LABEL: @computesignbits_through_two_input_shuffle(
-; CHECK-NEXT: [[COND:%.*]] = shufflevector <4 x i1> [[COND1:%.*]], <4 x i1> [[COND2:%.*]], <4 x i32> <i32 0, i32 2, i32 4, i32 6>
-; CHECK-NEXT: [[SEL:%.*]] = select <4 x i1> [[COND]], <4 x i32> [[Y:%.*]], <4 x i32> [[X:%.*]]
+; CHECK-NEXT: [[SEXT1:%.*]] = sext <4 x i1> [[COND1:%.*]] to <4 x i32>
+; CHECK-NEXT: [[SEXT2:%.*]] = sext <4 x i1> [[COND2:%.*]] to <4 x i32>
+; CHECK-NEXT: [[COND:%.*]] = shufflevector <4 x i32> [[SEXT1]], <4 x i32> [[SEXT2]], <4 x i32> <i32 0, i32 2, i32 4, i32 6>
+; CHECK-NEXT: [[TMP1:%.*]] = trunc <4 x i32> [[COND]] to <4 x i1>
+; CHECK-NEXT: [[SEL:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[Y:%.*]], <4 x i32> [[X:%.*]]
; CHECK-NEXT: ret <4 x i32> [[SEL]]
;
%sext1 = sext <4 x i1> %cond1 to <4 x i32>
diff --git a/llvm/test/Transforms/InstCombine/logical-select.ll b/llvm/test/Transforms/InstCombine/logical-select.ll
index af1a3e1455e492..fcca9588767dd9 100644
--- a/llvm/test/Transforms/InstCombine/logical-select.ll
+++ b/llvm/test/Transforms/InstCombine/logical-select.ll
@@ -707,8 +707,11 @@ define <4 x i32> @computesignbits_through_shuffles(<4 x float> %x, <4 x float> %
define <4 x i32> @computesignbits_through_two_input_shuffle(<4 x i32> %x, <4 x i32> %y, <4 x i1> %cond1, <4 x i1> %cond2) {
; CHECK-LABEL: @computesignbits_through_two_input_shuffle(
-; CHECK-NEXT: [[COND:%.*]] = shufflevector <4 x i1> [[COND1:%.*]], <4 x i1> [[COND2:%.*]], <4 x i32> <i32 0, i32 2, i32 4, i32 6>
-; CHECK-NEXT: [[SEL:%.*]] = select <4 x i1> [[COND]], <4 x i32> [[Y:%.*]], <4 x i32> [[X:%.*]]
+; CHECK-NEXT: [[SEXT1:%.*]] = sext <4 x i1> [[COND1:%.*]] to <4 x i32>
+; CHECK-NEXT: [[SEXT2:%.*]] = sext <4 x i1> [[COND2:%.*]] to <4 x i32>
+; CHECK-NEXT: [[COND:%.*]] = shufflevector <4 x i32> [[SEXT1]], <4 x i32> [[SEXT2]], <4 x i32> <i32 0, i32 2, i32 4, i32 6>
+; CHECK-NEXT: [[TMP1:%.*]] = trunc <4 x i32> [[COND]] to <4 x i1>
+; CHECK-NEXT: [[SEL:%.*]] = select <4 x i1> [[TMP1]], <4 x i32> [[Y:%.*]], <4 x i32> [[X:%.*]]
; CHECK-NEXT: ret <4 x i32> [[SEL]]
;
%sext1 = sext <4 x i1> %cond1 to <4 x i32>
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