[llvm] [RISCV] Prevent RISCVMergeBaseOffsetOpt from calling getVRegDef on a physical register. (PR #78762)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Fri Jan 19 11:31:15 PST 2024


topperc wrote:

> `MachineInstr &OffsetTail = *MRI->getVRegDef(Reg);` also appears twice in the file, don't those need guarding? Maybe hasOneUse happens to be sufficient somehow to prevent that, but if so it's not immediately obvious to me why.

They seem pretty unlikely. It would mean we have a ADD or SHXADD with an X0 or other physical register operand. ISel doesn't create those today and we haven't ran the coalescer yet so I don't think it can happen. But I'll fix them too.

https://github.com/llvm/llvm-project/pull/78762


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