[llvm] [InstCombine] Resolve TODO: Remove one-time check if other logic operand (Y) is constant (PR #77973)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 19 11:20:12 PST 2024
https://github.com/AtariDreams updated https://github.com/llvm/llvm-project/pull/77973
>From e131af8e6f97388a64dd378a170002d13bf72a8e Mon Sep 17 00:00:00 2001
From: Rose <83477269+AtariDreams at users.noreply.github.com>
Date: Sun, 14 Jan 2024 12:53:37 -0500
Subject: [PATCH 1/2] [InstCombine] Add pre-commit tests [NFC]
---
.../Transforms/InstCombine/shift-logic.ll | 125 ++++++++++++++++++
1 file changed, 125 insertions(+)
diff --git a/llvm/test/Transforms/InstCombine/shift-logic.ll b/llvm/test/Transforms/InstCombine/shift-logic.ll
index 544694d398431e3..96fe6ba84c9826d 100644
--- a/llvm/test/Transforms/InstCombine/shift-logic.ll
+++ b/llvm/test/Transforms/InstCombine/shift-logic.ll
@@ -16,6 +16,8 @@ define i8 @shl_and(i8 %x, i8 %y) {
ret i8 %sh1
}
+declare void @use1(<2 x i8>)
+
define <2 x i8> @shl_and_nonuniform(<2 x i8> %x, <2 x i8> %y) {
; CHECK-LABEL: @shl_and_nonuniform(
; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i8> [[X:%.*]], <i8 5, i8 4>
@@ -29,6 +31,21 @@ define <2 x i8> @shl_and_nonuniform(<2 x i8> %x, <2 x i8> %y) {
ret <2 x i8> %sh1
}
+define <2 x i8> @shl_and_nonuniform_multiuse(<2 x i8> %x) {
+; CHECK-LABEL: @shl_and_nonuniform_multiuse(
+; CHECK-NEXT: [[SH0:%.*]] = shl <2 x i8> [[X:%.*]], <i8 3, i8 4>
+; CHECK-NEXT: [[R:%.*]] = and <2 x i8> [[SH0]], <i8 42, i8 42>
+; CHECK-NEXT: call void @use1(<2 x i8> [[SH0]])
+; CHECK-NEXT: [[SH1:%.*]] = shl nuw <2 x i8> [[R]], <i8 2, i8 0>
+; CHECK-NEXT: ret <2 x i8> [[SH1]]
+;
+ %sh0 = shl <2 x i8> %x, <i8 3, i8 4>
+ %r = and <2 x i8> %sh0, <i8 42, i8 42> ; constant operand on the 'and'
+ call void @use1(<2 x i8> %sh0)
+ %sh1 = shl <2 x i8> %r, <i8 2, i8 0>
+ ret <2 x i8> %sh1
+}
+
define i16 @shl_or(i16 %x, i16 %py) {
; CHECK-LABEL: @shl_or(
; CHECK-NEXT: [[Y:%.*]] = srem i16 [[PY:%.*]], 42
@@ -59,6 +76,23 @@ define <2 x i16> @shl_or_undef(<2 x i16> %x, <2 x i16> %py) {
ret <2 x i16> %sh1
}
+define <2 x i16> @shl_or_undef_multiuse(<2 x i16> %x) {
+; CHECK-LABEL: @shl_or_undef_multiuse(
+; CHECK-NEXT: [[SH0:%.*]] = shl <2 x i16> [[X:%.*]], <i16 5, i16 undef>
+; CHECK-NEXT: [[R:%.*]] = or <2 x i16> [[SH0]], <i16 42, i16 42>
+; CHECK-NEXT: call void @use2(<2 x i16> [[SH0]])
+; CHECK-NEXT: [[SH1:%.*]] = shl <2 x i16> [[R]], <i16 7, i16 undef>
+; CHECK-NEXT: ret <2 x i16> [[SH1]]
+;
+ %sh0 = shl <2 x i16> %x, <i16 5, i16 undef>
+ %r = or <2 x i16> <i16 42, i16 42>, %sh0 ; constant operand on the 'or'
+ call void @use2(<2 x i16> %sh0)
+ %sh1 = shl <2 x i16> %r, <i16 7, i16 undef>
+ ret <2 x i16> %sh1
+}
+
+declare void @use2(<2 x i16>)
+
define i32 @shl_xor(i32 %x, i32 %y) {
; CHECK-LABEL: @shl_xor(
; CHECK-NEXT: [[TMP1:%.*]] = shl i32 [[X:%.*]], 12
@@ -85,6 +119,23 @@ define <2 x i32> @shl_xor_nonuniform(<2 x i32> %x, <2 x i32> %y) {
ret <2 x i32> %sh1
}
+declare void @use3(<2 x i32>)
+
+define <2 x i32> @shl_xor_nonuniform_multiuse(<2 x i32> %x) {
+; CHECK-LABEL: @shl_xor_nonuniform_multiuse(
+; CHECK-NEXT: [[SH0:%.*]] = shl <2 x i32> [[X:%.*]], <i32 5, i32 6>
+; CHECK-NEXT: [[R:%.*]] = xor <2 x i32> [[SH0]], <i32 42, i32 42>
+; CHECK-NEXT: call void @use3(<2 x i32> [[SH0]])
+; CHECK-NEXT: [[SH1:%.*]] = shl <2 x i32> [[R]], <i32 7, i32 8>
+; CHECK-NEXT: ret <2 x i32> [[SH1]]
+;
+ %sh0 = shl <2 x i32> %x, <i32 5, i32 6>
+ %r = xor <2 x i32> <i32 42, i32 42>, %sh0 ; constant operand on the 'xor'
+ call void @use3(<2 x i32> %sh0)
+ %sh1 = shl <2 x i32> %r, <i32 7, i32 8>
+ ret <2 x i32> %sh1
+}
+
define i64 @lshr_and(i64 %x, i64 %py) {
; CHECK-LABEL: @lshr_and(
; CHECK-NEXT: [[Y:%.*]] = srem i64 [[PY:%.*]], 42
@@ -115,6 +166,23 @@ define <2 x i64> @lshr_and_undef(<2 x i64> %x, <2 x i64> %py) {
ret <2 x i64> %sh1
}
+define <2 x i64> @lshr_and_undef_multiuse(<2 x i64> %x) {
+; CHECK-LABEL: @lshr_and_undef_multiuse(
+; CHECK-NEXT: [[SH0:%.*]] = lshr <2 x i64> [[X:%.*]], <i64 5, i64 undef>
+; CHECK-NEXT: [[R:%.*]] = and <2 x i64> [[SH0]], <i64 42, i64 42>
+; CHECK-NEXT: call void @use4(<2 x i64> [[SH0]])
+; CHECK-NEXT: [[SH1:%.*]] = lshr <2 x i64> [[R]], <i64 7, i64 undef>
+; CHECK-NEXT: ret <2 x i64> [[SH1]]
+;
+ %sh0 = lshr <2 x i64> %x, <i64 5, i64 undef>
+ %r = and <2 x i64> <i64 42, i64 42>, %sh0 ; constant operand on the 'and'
+ call void @use4(<2 x i64> %sh0)
+ %sh1 = lshr <2 x i64> %r, <i64 7, i64 undef>
+ ret <2 x i64> %sh1
+}
+
+declare void @use4(<2 x i64>)
+
define <4 x i32> @lshr_or(<4 x i32> %x, <4 x i32> %y) {
; CHECK-LABEL: @lshr_or(
; CHECK-NEXT: [[TMP1:%.*]] = lshr <4 x i32> [[X:%.*]], <i32 12, i32 12, i32 12, i32 12>
@@ -359,6 +427,21 @@ define <2 x i8> @shl_add_nonuniform(<2 x i8> %x, <2 x i8> %y) {
ret <2 x i8> %sh1
}
+define <2 x i8> @shl_add_nonuniform_multiuse(<2 x i8> %x) {
+; CHECK-LABEL: @shl_add_nonuniform_multiuse(
+; CHECK-NEXT: [[SH0:%.*]] = shl <2 x i8> [[X:%.*]], <i8 3, i8 4>
+; CHECK-NEXT: call void @use1(<2 x i8> [[SH0]])
+; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i8> [[X]], <i8 5, i8 4>
+; CHECK-NEXT: [[SH1:%.*]] = add <2 x i8> [[TMP1]], <i8 -88, i8 42>
+; CHECK-NEXT: ret <2 x i8> [[SH1]]
+;
+ %sh0 = shl <2 x i8> %x, <i8 3, i8 4>
+ %r = add <2 x i8> %sh0, <i8 42, i8 42> ; constant operand on the 'add'
+ call void @use1(<2 x i8> %sh0)
+ %sh1 = shl <2 x i8> %r, <i8 2, i8 0>
+ ret <2 x i8> %sh1
+}
+
define <2 x i64> @shl_add_undef(<2 x i64> %x, <2 x i64> %py) {
; CHECK-LABEL: @shl_add_undef(
@@ -375,6 +458,20 @@ define <2 x i64> @shl_add_undef(<2 x i64> %x, <2 x i64> %py) {
ret <2 x i64> %sh1
}
+define <2 x i64> @shl_add_undef_multiuse(<2 x i64> %x) {
+; CHECK-LABEL: @shl_add_undef_multiuse(
+; CHECK-NEXT: [[SH0:%.*]] = shl <2 x i64> [[X:%.*]], <i64 5, i64 undef>
+; CHECK-NEXT: [[R:%.*]] = add <2 x i64> [[SH0]], <i64 42, i64 42>
+; CHECK-NEXT: call void @use4(<2 x i64> [[SH0]])
+; CHECK-NEXT: [[SH1:%.*]] = shl <2 x i64> [[R]], <i64 7, i64 undef>
+; CHECK-NEXT: ret <2 x i64> [[SH1]]
+;
+ %sh0 = shl <2 x i64> %x, <i64 5, i64 undef>
+ %r = add <2 x i64> <i64 42, i64 42>, %sh0 ; constant operand on the 'add'
+ call void @use4(<2 x i64> %sh0)
+ %sh1 = shl <2 x i64> %r, <i64 7, i64 undef>
+ ret <2 x i64> %sh1
+}
define i8 @lshr_add(i8 %x, i8 %y) {
; CHECK-LABEL: @lshr_add(
@@ -457,6 +554,20 @@ define <2 x i8> @shl_sub_nonuniform(<2 x i8> %x, <2 x i8> %y) {
ret <2 x i8> %sh1
}
+define <2 x i8> @shl_sub_nonuniform_multiuse(<2 x i8> %x) {
+; CHECK-LABEL: @shl_sub_nonuniform_multiuse(
+; CHECK-NEXT: [[SH0:%.*]] = shl <2 x i8> [[X:%.*]], <i8 3, i8 4>
+; CHECK-NEXT: [[R:%.*]] = add <2 x i8> [[SH0]], <i8 -42, i8 -42>
+; CHECK-NEXT: call void @use1(<2 x i8> [[SH0]])
+; CHECK-NEXT: [[SH1:%.*]] = shl <2 x i8> [[R]], <i8 2, i8 0>
+; CHECK-NEXT: ret <2 x i8> [[SH1]]
+;
+ %sh0 = shl <2 x i8> %x, <i8 3, i8 4>
+ %r = sub <2 x i8> %sh0, <i8 42, i8 42>
+ call void @use1(<2 x i8> %sh0)
+ %sh1 = shl <2 x i8> %r, <i8 2, i8 0>
+ ret <2 x i8> %sh1
+}
define <2 x i64> @shl_sub_undef(<2 x i64> %x, <2 x i64> %py) {
; CHECK-LABEL: @shl_sub_undef(
@@ -473,6 +584,20 @@ define <2 x i64> @shl_sub_undef(<2 x i64> %x, <2 x i64> %py) {
ret <2 x i64> %sh1
}
+define <2 x i64> @shl_sub_undef_multiuse(<2 x i64> %x) {
+; CHECK-LABEL: @shl_sub_undef_multiuse(
+; CHECK-NEXT: [[SH0:%.*]] = shl <2 x i64> [[X:%.*]], <i64 5, i64 undef>
+; CHECK-NEXT: [[R:%.*]] = sub <2 x i64> <i64 42, i64 42>, [[SH0]]
+; CHECK-NEXT: call void @use4(<2 x i64> [[SH0]])
+; CHECK-NEXT: [[SH1:%.*]] = shl <2 x i64> [[R]], <i64 7, i64 undef>
+; CHECK-NEXT: ret <2 x i64> [[SH1]]
+;
+ %sh0 = shl <2 x i64> %x, <i64 5, i64 undef>
+ %r = sub <2 x i64> <i64 42, i64 42>, %sh0 ; constant operand on the 'sub'
+ call void @use4(<2 x i64> %sh0)
+ %sh1 = shl <2 x i64> %r, <i64 7, i64 undef>
+ ret <2 x i64> %sh1
+}
define i8 @lshr_sub(i8 %x, i8 %y) {
; CHECK-LABEL: @lshr_sub(
>From 57d0ed1abfb11be896e5bffddce4bd10aebbe679 Mon Sep 17 00:00:00 2001
From: Rose <83477269+AtariDreams at users.noreply.github.com>
Date: Fri, 12 Jan 2024 15:15:27 -0500
Subject: [PATCH 2/2] [Transforms] Remove one-time check if other logic operand
(Y) is constant
By using match(W, m_ImmConstant()), we do not need to worry about one-time use anymore.
---
.../InstCombine/InstCombineShifts.cpp | 17 +++++------
.../Transforms/InstCombine/shift-logic.ll | 28 +++++++++----------
2 files changed, 22 insertions(+), 23 deletions(-)
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
index b7958978c450c98..b6f27295120db31 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
@@ -368,23 +368,24 @@ static Instruction *foldShiftOfShiftedBinOp(BinaryOperator &I,
// Find a matching one-use shift by constant. The fold is not valid if the sum
// of the shift values equals or exceeds bitwidth.
- // TODO: Remove the one-use check if the other logic operand (Y) is constant.
Value *X, *Y;
- auto matchFirstShift = [&](Value *V) {
+ auto matchFirstShift = [&](Value *V, Value *W) {
APInt Threshold(Ty->getScalarSizeInBits(), Ty->getScalarSizeInBits());
- return match(V,
- m_OneUse(m_BinOp(ShiftOpcode, m_Value(X), m_Constant(C0)))) &&
- match(ConstantExpr::getAdd(C0, C1),
- m_SpecificInt_ICMP(ICmpInst::ICMP_ULT, Threshold));
+ auto binOp = m_BinOp(ShiftOpcode, m_Value(X), m_Constant(C0));
+ return (match(W, m_ImmConstant()))
+ ? match(V, binOp)
+ : match(V, m_OneUse(binOp)) &&
+ match(ConstantExpr::getAdd(C0, C1),
+ m_SpecificInt_ICMP(ICmpInst::ICMP_ULT, Threshold));
};
// Logic ops and Add are commutative, so check each operand for a match. Sub
// is not so we cannot reoder if we match operand(1) and need to keep the
// operands in their original positions.
bool FirstShiftIsOp1 = false;
- if (matchFirstShift(BinInst->getOperand(0)))
+ if (matchFirstShift(BinInst->getOperand(0), BinInst->getOperand(1)))
Y = BinInst->getOperand(1);
- else if (matchFirstShift(BinInst->getOperand(1))) {
+ else if (matchFirstShift(BinInst->getOperand(1), BinInst->getOperand(0))) {
Y = BinInst->getOperand(0);
FirstShiftIsOp1 = BinInst->getOpcode() == Instruction::Sub;
} else
diff --git a/llvm/test/Transforms/InstCombine/shift-logic.ll b/llvm/test/Transforms/InstCombine/shift-logic.ll
index 96fe6ba84c9826d..f21388485ba98d3 100644
--- a/llvm/test/Transforms/InstCombine/shift-logic.ll
+++ b/llvm/test/Transforms/InstCombine/shift-logic.ll
@@ -34,9 +34,9 @@ define <2 x i8> @shl_and_nonuniform(<2 x i8> %x, <2 x i8> %y) {
define <2 x i8> @shl_and_nonuniform_multiuse(<2 x i8> %x) {
; CHECK-LABEL: @shl_and_nonuniform_multiuse(
; CHECK-NEXT: [[SH0:%.*]] = shl <2 x i8> [[X:%.*]], <i8 3, i8 4>
-; CHECK-NEXT: [[R:%.*]] = and <2 x i8> [[SH0]], <i8 42, i8 42>
; CHECK-NEXT: call void @use1(<2 x i8> [[SH0]])
-; CHECK-NEXT: [[SH1:%.*]] = shl nuw <2 x i8> [[R]], <i8 2, i8 0>
+; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i8> [[X]], <i8 5, i8 4>
+; CHECK-NEXT: [[SH1:%.*]] = and <2 x i8> [[TMP1]], <i8 -88, i8 42>
; CHECK-NEXT: ret <2 x i8> [[SH1]]
;
%sh0 = shl <2 x i8> %x, <i8 3, i8 4>
@@ -79,9 +79,9 @@ define <2 x i16> @shl_or_undef(<2 x i16> %x, <2 x i16> %py) {
define <2 x i16> @shl_or_undef_multiuse(<2 x i16> %x) {
; CHECK-LABEL: @shl_or_undef_multiuse(
; CHECK-NEXT: [[SH0:%.*]] = shl <2 x i16> [[X:%.*]], <i16 5, i16 undef>
-; CHECK-NEXT: [[R:%.*]] = or <2 x i16> [[SH0]], <i16 42, i16 42>
; CHECK-NEXT: call void @use2(<2 x i16> [[SH0]])
-; CHECK-NEXT: [[SH1:%.*]] = shl <2 x i16> [[R]], <i16 7, i16 undef>
+; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i16> [[X]], <i16 12, i16 undef>
+; CHECK-NEXT: [[SH1:%.*]] = or <2 x i16> [[TMP1]], <i16 5376, i16 poison>
; CHECK-NEXT: ret <2 x i16> [[SH1]]
;
%sh0 = shl <2 x i16> %x, <i16 5, i16 undef>
@@ -124,9 +124,9 @@ declare void @use3(<2 x i32>)
define <2 x i32> @shl_xor_nonuniform_multiuse(<2 x i32> %x) {
; CHECK-LABEL: @shl_xor_nonuniform_multiuse(
; CHECK-NEXT: [[SH0:%.*]] = shl <2 x i32> [[X:%.*]], <i32 5, i32 6>
-; CHECK-NEXT: [[R:%.*]] = xor <2 x i32> [[SH0]], <i32 42, i32 42>
; CHECK-NEXT: call void @use3(<2 x i32> [[SH0]])
-; CHECK-NEXT: [[SH1:%.*]] = shl <2 x i32> [[R]], <i32 7, i32 8>
+; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i32> [[X]], <i32 12, i32 14>
+; CHECK-NEXT: [[SH1:%.*]] = xor <2 x i32> [[TMP1]], <i32 5376, i32 10752>
; CHECK-NEXT: ret <2 x i32> [[SH1]]
;
%sh0 = shl <2 x i32> %x, <i32 5, i32 6>
@@ -169,10 +169,8 @@ define <2 x i64> @lshr_and_undef(<2 x i64> %x, <2 x i64> %py) {
define <2 x i64> @lshr_and_undef_multiuse(<2 x i64> %x) {
; CHECK-LABEL: @lshr_and_undef_multiuse(
; CHECK-NEXT: [[SH0:%.*]] = lshr <2 x i64> [[X:%.*]], <i64 5, i64 undef>
-; CHECK-NEXT: [[R:%.*]] = and <2 x i64> [[SH0]], <i64 42, i64 42>
; CHECK-NEXT: call void @use4(<2 x i64> [[SH0]])
-; CHECK-NEXT: [[SH1:%.*]] = lshr <2 x i64> [[R]], <i64 7, i64 undef>
-; CHECK-NEXT: ret <2 x i64> [[SH1]]
+; CHECK-NEXT: ret <2 x i64> zeroinitializer
;
%sh0 = lshr <2 x i64> %x, <i64 5, i64 undef>
%r = and <2 x i64> <i64 42, i64 42>, %sh0 ; constant operand on the 'and'
@@ -461,9 +459,9 @@ define <2 x i64> @shl_add_undef(<2 x i64> %x, <2 x i64> %py) {
define <2 x i64> @shl_add_undef_multiuse(<2 x i64> %x) {
; CHECK-LABEL: @shl_add_undef_multiuse(
; CHECK-NEXT: [[SH0:%.*]] = shl <2 x i64> [[X:%.*]], <i64 5, i64 undef>
-; CHECK-NEXT: [[R:%.*]] = add <2 x i64> [[SH0]], <i64 42, i64 42>
; CHECK-NEXT: call void @use4(<2 x i64> [[SH0]])
-; CHECK-NEXT: [[SH1:%.*]] = shl <2 x i64> [[R]], <i64 7, i64 undef>
+; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i64> [[X]], <i64 12, i64 undef>
+; CHECK-NEXT: [[SH1:%.*]] = add <2 x i64> [[TMP1]], <i64 5376, i64 poison>
; CHECK-NEXT: ret <2 x i64> [[SH1]]
;
%sh0 = shl <2 x i64> %x, <i64 5, i64 undef>
@@ -557,9 +555,9 @@ define <2 x i8> @shl_sub_nonuniform(<2 x i8> %x, <2 x i8> %y) {
define <2 x i8> @shl_sub_nonuniform_multiuse(<2 x i8> %x) {
; CHECK-LABEL: @shl_sub_nonuniform_multiuse(
; CHECK-NEXT: [[SH0:%.*]] = shl <2 x i8> [[X:%.*]], <i8 3, i8 4>
-; CHECK-NEXT: [[R:%.*]] = add <2 x i8> [[SH0]], <i8 -42, i8 -42>
; CHECK-NEXT: call void @use1(<2 x i8> [[SH0]])
-; CHECK-NEXT: [[SH1:%.*]] = shl <2 x i8> [[R]], <i8 2, i8 0>
+; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i8> [[X]], <i8 5, i8 4>
+; CHECK-NEXT: [[SH1:%.*]] = add <2 x i8> [[TMP1]], <i8 88, i8 -42>
; CHECK-NEXT: ret <2 x i8> [[SH1]]
;
%sh0 = shl <2 x i8> %x, <i8 3, i8 4>
@@ -587,9 +585,9 @@ define <2 x i64> @shl_sub_undef(<2 x i64> %x, <2 x i64> %py) {
define <2 x i64> @shl_sub_undef_multiuse(<2 x i64> %x) {
; CHECK-LABEL: @shl_sub_undef_multiuse(
; CHECK-NEXT: [[SH0:%.*]] = shl <2 x i64> [[X:%.*]], <i64 5, i64 undef>
-; CHECK-NEXT: [[R:%.*]] = sub <2 x i64> <i64 42, i64 42>, [[SH0]]
; CHECK-NEXT: call void @use4(<2 x i64> [[SH0]])
-; CHECK-NEXT: [[SH1:%.*]] = shl <2 x i64> [[R]], <i64 7, i64 undef>
+; CHECK-NEXT: [[TMP1:%.*]] = shl <2 x i64> [[X]], <i64 12, i64 undef>
+; CHECK-NEXT: [[SH1:%.*]] = sub <2 x i64> <i64 5376, i64 poison>, [[TMP1]]
; CHECK-NEXT: ret <2 x i64> [[SH1]]
;
%sh0 = shl <2 x i64> %x, <i64 5, i64 undef>
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