[llvm] e89a7c4 - [AMDGPU] Update comment on SIInstrInfo::isLegalFLATOffset for GFX12

[Jay Foad via llvm-commits]

Author: Jay Foad
Date: 2024-01-19T15:53:06Z
New Revision: e89a7c41ba2d94866157056a88cfc083fa9d9cb5

URL: https://github.com/llvm/llvm-project/commit/e89a7c41ba2d94866157056a88cfc083fa9d9cb5
DIFF: https://github.com/llvm/llvm-project/commit/e89a7c41ba2d94866157056a88cfc083fa9d9cb5.diff

LOG: [AMDGPU] Update comment on SIInstrInfo::isLegalFLATOffset for GFX12

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index 5a9401103da8228..f4ca27808a30411 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -8968,8 +8968,9 @@ bool SIInstrInfo::splitMUBUFOffset(uint32_t Imm, uint32_t &SOffset,
 
 // Depending on the used address space and instructions, some immediate offsets
 // are allowed and some are not.
-// In general, flat instruction offsets can only be non-negative, global and
-// scratch instruction offsets can also be negative.
+// Pre-GFX12, flat instruction offsets can only be non-negative, global and
+// scratch instruction offsets can also be negative. On GFX12, offsets can be
+// negative for all variants.
 //
 // There are several bugs related to these offsets:
 // On gfx10.1, flat instructions that go into the global address space cannot