[llvm] [AArch64] Add custom lowering for load <3 x i8>. (PR #78632)

Eli Friedman via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 18 14:16:13 PST 2024


efriedma-quic wrote:

Is there some reason to prefer that sequence over a shorter sequence, like a pair of ld1r followed by a zip1?  I mean, I can imagine your sequence is faster on certain CPUs, but I'd want to document the reasoning.

https://github.com/llvm/llvm-project/pull/78632


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