[llvm] [X86] Support immediate encoding optimization for ndd instructions (PR #78545)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 17 23:28:28 PST 2024
https://github.com/XinWang10 created https://github.com/llvm/llvm-project/pull/78545
Now llvm don't generate instructions like ADD32mi8 in lowering phase, but use ADD32mi, and optimize them to ADD32mi8 in encoding optimization pass, this patch support the compressing of the NDD version.
>From 23b35989ad31b3eebf1f3b15b4f30c79e5da0d4c Mon Sep 17 00:00:00 2001
From: "Wang, Xin10" <xin10.wang at intel.com>
Date: Wed, 17 Jan 2024 23:23:34 -0800
Subject: [PATCH] [X86] Support encoding optimization fo immediate for ndd
instructions
---
.../X86EncodingOptimizationForImmediate.def | 72 +++++++++++++++++++
llvm/test/CodeGen/X86/apx/adc.ll | 18 ++---
llvm/test/CodeGen/X86/apx/add.ll | 16 ++---
llvm/test/CodeGen/X86/apx/and.ll | 14 ++--
llvm/test/CodeGen/X86/apx/or.ll | 16 ++---
llvm/test/CodeGen/X86/apx/sbb.ll | 24 +++----
llvm/test/CodeGen/X86/apx/sub.ll | 16 ++---
llvm/test/CodeGen/X86/apx/xor.ll | 20 +++---
8 files changed, 134 insertions(+), 62 deletions(-)
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimizationForImmediate.def b/llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimizationForImmediate.def
index e475e55260ed36..e86860e06922e6 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimizationForImmediate.def
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimizationForImmediate.def
@@ -69,4 +69,76 @@ ENTRY(IMUL64rri32, IMUL64rri8)
ENTRY(PUSH16i, PUSH16i8)
ENTRY(PUSH32i, PUSH32i8)
ENTRY(PUSH64i32, PUSH64i8)
+ENTRY(ADC16mi_ND, ADC16mi8_ND)
+ENTRY(ADC16ri_ND, ADC16ri8_ND)
+ENTRY(ADC32mi_ND, ADC32mi8_ND)
+ENTRY(ADC32ri_ND, ADC32ri8_ND)
+ENTRY(ADC64mi32_ND, ADC64mi8_ND)
+ENTRY(ADC64ri32_ND, ADC64ri8_ND)
+ENTRY(SBB16mi_ND, SBB16mi8_ND)
+ENTRY(SBB16ri_ND, SBB16ri8_ND)
+ENTRY(SBB32mi_ND, SBB32mi8_ND)
+ENTRY(SBB32ri_ND, SBB32ri8_ND)
+ENTRY(SBB64mi32_ND, SBB64mi8_ND)
+ENTRY(SBB64ri32_ND, SBB64ri8_ND)
+ENTRY(ADD16mi_ND, ADD16mi8_ND)
+ENTRY(ADD16ri_ND, ADD16ri8_ND)
+ENTRY(ADD32mi_ND, ADD32mi8_ND)
+ENTRY(ADD32ri_ND, ADD32ri8_ND)
+ENTRY(ADD64mi32_ND, ADD64mi8_ND)
+ENTRY(ADD64ri32_ND, ADD64ri8_ND)
+ENTRY(AND16mi_ND, AND16mi8_ND)
+ENTRY(AND16ri_ND, AND16ri8_ND)
+ENTRY(AND32mi_ND, AND32mi8_ND)
+ENTRY(AND32ri_ND, AND32ri8_ND)
+ENTRY(AND64mi32_ND, AND64mi8_ND)
+ENTRY(AND64ri32_ND, AND64ri8_ND)
+ENTRY(OR16mi_ND, OR16mi8_ND)
+ENTRY(OR16ri_ND, OR16ri8_ND)
+ENTRY(OR32mi_ND, OR32mi8_ND)
+ENTRY(OR32ri_ND, OR32ri8_ND)
+ENTRY(OR64mi32_ND, OR64mi8_ND)
+ENTRY(OR64ri32_ND, OR64ri8_ND)
+ENTRY(SUB16mi_ND, SUB16mi8_ND)
+ENTRY(SUB16ri_ND, SUB16ri8_ND)
+ENTRY(SUB32mi_ND, SUB32mi8_ND)
+ENTRY(SUB32ri_ND, SUB32ri8_ND)
+ENTRY(SUB64mi32_ND, SUB64mi8_ND)
+ENTRY(SUB64ri32_ND, SUB64ri8_ND)
+ENTRY(XOR16mi_ND, XOR16mi8_ND)
+ENTRY(XOR16ri_ND, XOR16ri8_ND)
+ENTRY(XOR32mi_ND, XOR32mi8_ND)
+ENTRY(XOR32ri_ND, XOR32ri8_ND)
+ENTRY(XOR64mi32_ND, XOR64mi8_ND)
+ENTRY(XOR64ri32_ND, XOR64ri8_ND)
+ENTRY(ADD16mi_NF_ND, ADD16mi8_NF_ND)
+ENTRY(ADD16ri_NF_ND, ADD16ri8_NF_ND)
+ENTRY(ADD32mi_NF_ND, ADD32mi8_NF_ND)
+ENTRY(ADD32ri_NF_ND, ADD32ri8_NF_ND)
+ENTRY(ADD64mi32_NF_ND, ADD64mi8_NF_ND)
+ENTRY(ADD64ri32_NF_ND, ADD64ri8_NF_ND)
+ENTRY(AND16mi_NF_ND, AND16mi8_NF_ND)
+ENTRY(AND16ri_NF_ND, AND16ri8_NF_ND)
+ENTRY(AND32mi_NF_ND, AND32mi8_NF_ND)
+ENTRY(AND32ri_NF_ND, AND32ri8_NF_ND)
+ENTRY(AND64mi32_NF_ND, AND64mi8_NF_ND)
+ENTRY(AND64ri32_NF_ND, AND64ri8_NF_ND)
+ENTRY(OR16mi_NF_ND, OR16mi8_NF_ND)
+ENTRY(OR16ri_NF_ND, OR16ri8_NF_ND)
+ENTRY(OR32mi_NF_ND, OR32mi8_NF_ND)
+ENTRY(OR32ri_NF_ND, OR32ri8_NF_ND)
+ENTRY(OR64mi32_NF_ND, OR64mi8_NF_ND)
+ENTRY(OR64ri32_NF_ND, OR64ri8_NF_ND)
+ENTRY(SUB16mi_NF_ND, SUB16mi8_NF_ND)
+ENTRY(SUB16ri_NF_ND, SUB16ri8_NF_ND)
+ENTRY(SUB32mi_NF_ND, SUB32mi8_NF_ND)
+ENTRY(SUB32ri_NF_ND, SUB32ri8_NF_ND)
+ENTRY(SUB64mi32_NF_ND, SUB64mi8_NF_ND)
+ENTRY(SUB64ri32_NF_ND, SUB64ri8_NF_ND)
+ENTRY(XOR16mi_NF_ND, XOR16mi8_NF_ND)
+ENTRY(XOR16ri_NF_ND, XOR16ri8_NF_ND)
+ENTRY(XOR32mi_NF_ND, XOR32mi8_NF_ND)
+ENTRY(XOR32ri_NF_ND, XOR32ri8_NF_ND)
+ENTRY(XOR64mi32_NF_ND, XOR64mi8_NF_ND)
+ENTRY(XOR64ri32_NF_ND, XOR64ri8_NF_ND)
#undef ENTRY
diff --git a/llvm/test/CodeGen/X86/apx/adc.ll b/llvm/test/CodeGen/X86/apx/adc.ll
index e8657acea8ad42..06ee17b3505635 100644
--- a/llvm/test/CodeGen/X86/apx/adc.ll
+++ b/llvm/test/CodeGen/X86/apx/adc.ll
@@ -113,7 +113,7 @@ define i16 @adc16ri8(i16 %a, i16 %x, i16 %y) nounwind {
; CHECK-LABEL: adc16ri8:
; CHECK: # %bb.0:
; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2]
-; CHECK-NEXT: adcw $0, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0xd7,0x00,0x00]
+; CHECK-NEXT: adcw $0, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x83,0xd7,0x00]
; CHECK-NEXT: addl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x7b]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
@@ -128,7 +128,7 @@ define i32 @adc32ri8(i32 %a, i32 %x, i32 %y) nounwind {
; CHECK-LABEL: adc32ri8:
; CHECK: # %bb.0:
; CHECK-NEXT: subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2]
-; CHECK-NEXT: adcl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xd7,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: adcl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xd7,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
%s = add i32 %a, 123
%k = icmp ugt i32 %x, %y
@@ -141,7 +141,7 @@ define i64 @adc64ri8(i64 %a, i64 %x, i64 %y) nounwind {
; CHECK-LABEL: adc64ri8:
; CHECK: # %bb.0:
; CHECK-NEXT: subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2]
-; CHECK-NEXT: adcq $123, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xd7,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: adcq $123, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0xd7,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
%s = add i64 %a, 123
%k = icmp ugt i64 %x, %y
@@ -167,7 +167,7 @@ define i16 @adc16ri(i16 %a, i16 %x, i16 %y) nounwind {
; CHECK-LABEL: adc16ri:
; CHECK: # %bb.0:
; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2]
-; CHECK-NEXT: adcw $0, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0xd7,0x00,0x00]
+; CHECK-NEXT: adcw $0, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x83,0xd7,0x00]
; CHECK-NEXT: addl $1234, %eax # EVEX TO LEGACY Compression encoding: [0x05,0xd2,0x04,0x00,0x00]
; CHECK-NEXT: # imm = 0x4D2
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
@@ -267,7 +267,7 @@ define i16 @adc16mi8(ptr %ptr, i16 %x, i16 %y) nounwind {
; CHECK-LABEL: adc16mi8:
; CHECK: # %bb.0:
; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2]
-; CHECK-NEXT: adcw $0, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0x17,0x00,0x00]
+; CHECK-NEXT: adcw $0, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x83,0x17,0x00]
; CHECK-NEXT: addl $123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x7b]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
@@ -283,7 +283,7 @@ define i32 @adc32mi8(ptr %ptr, i32 %x, i32 %y) nounwind {
; CHECK-LABEL: adc32mi8:
; CHECK: # %bb.0:
; CHECK-NEXT: subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2]
-; CHECK-NEXT: adcl $123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x17,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: adcl $123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0x17,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
%a = load i32, ptr %ptr
%s = add i32 %a, 123
@@ -297,7 +297,7 @@ define i64 @adc64mi8(ptr %ptr, i64 %x, i64 %y) nounwind {
; CHECK-LABEL: adc64mi8:
; CHECK: # %bb.0:
; CHECK-NEXT: subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2]
-; CHECK-NEXT: adcq $123, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x17,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: adcq $123, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0x17,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
%a = load i64, ptr %ptr
%s = add i64 %a, 123
@@ -325,7 +325,7 @@ define i16 @adc16mi(ptr %ptr, i16 %x, i16 %y) nounwind {
; CHECK-LABEL: adc16mi:
; CHECK: # %bb.0:
; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2]
-; CHECK-NEXT: adcw $0, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0x17,0x00,0x00]
+; CHECK-NEXT: adcw $0, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x83,0x17,0x00]
; CHECK-NEXT: addl $1234, %eax # EVEX TO LEGACY Compression encoding: [0x05,0xd2,0x04,0x00,0x00]
; CHECK-NEXT: # imm = 0x4D2
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
@@ -447,7 +447,7 @@ define void @adc16mi_legacy(ptr %ptr, i16 %x, i16 %y) nounwind {
; CHECK-LABEL: adc16mi_legacy:
; CHECK: # %bb.0:
; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2]
-; CHECK-NEXT: adcw $0, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0x17,0x00,0x00]
+; CHECK-NEXT: adcw $0, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x83,0x17,0x00]
; CHECK-NEXT: addl $1234, %eax # EVEX TO LEGACY Compression encoding: [0x05,0xd2,0x04,0x00,0x00]
; CHECK-NEXT: # imm = 0x4D2
; CHECK-NEXT: movw %ax, (%rdi) # encoding: [0x66,0x89,0x07]
diff --git a/llvm/test/CodeGen/X86/apx/add.ll b/llvm/test/CodeGen/X86/apx/add.ll
index a42f872b93e16f..cdb29a70770e4b 100644
--- a/llvm/test/CodeGen/X86/apx/add.ll
+++ b/llvm/test/CodeGen/X86/apx/add.ll
@@ -89,7 +89,7 @@ entry:
define i16 @add16ri8(i16 noundef %a) {
; CHECK-LABEL: add16ri8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xc7,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: addl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xc7,0x7b]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
entry:
@@ -100,7 +100,7 @@ entry:
define i32 @add32ri8(i32 noundef %a) {
; CHECK-LABEL: add32ri8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xc7,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: addl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xc7,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
entry:
%add = add i32 %a, 123
@@ -110,7 +110,7 @@ entry:
define i64 @add64ri8(i64 noundef %a) {
; CHECK-LABEL: add64ri8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addq $123, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xc7,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: addq $123, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0xc7,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
entry:
%add = add i64 %a, 123
@@ -221,7 +221,7 @@ entry:
define i32 @add32mi8(ptr %a) {
; CHECK-LABEL: add32mi8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addl $123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x07,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: addl $123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0x07,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
@@ -232,7 +232,7 @@ entry:
define i64 @add64mi8(ptr %a) {
; CHECK-LABEL: add64mi8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addq $123, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x07,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: addq $123, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0x07,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
entry:
%t= load i64, ptr %a
@@ -405,7 +405,7 @@ entry:
define i16 @addflag16ri8(i16 noundef %a) {
; CHECK-LABEL: addflag16ri8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addw $123, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x81,0xc7,0x7b,0x00]
+; CHECK-NEXT: addw $123, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x83,0xc7,0x7b]
; CHECK-NEXT: movl $65535, %eax # encoding: [0xb8,0xff,0xff,0x00,0x00]
; CHECK-NEXT: # imm = 0xFFFF
; CHECK-NEXT: cmovael %ecx, %eax # encoding: [0x0f,0x43,0xc1]
@@ -419,7 +419,7 @@ entry:
define i32 @addflag32ri8(i32 noundef %a) {
; CHECK-LABEL: addflag32ri8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addl $123, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x81,0xc7,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: addl $123, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x83,0xc7,0x7b]
; CHECK-NEXT: movl $-1, %eax # encoding: [0xb8,0xff,0xff,0xff,0xff]
; CHECK-NEXT: cmovael %ecx, %eax # encoding: [0x0f,0x43,0xc1]
; CHECK-NEXT: retq # encoding: [0xc3]
@@ -431,7 +431,7 @@ entry:
define i64 @addflag64ri8(i64 noundef %a) {
; CHECK-LABEL: addflag64ri8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addq $123, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x81,0xc7,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: addq $123, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x83,0xc7,0x7b]
; CHECK-NEXT: movq $-1, %rax # encoding: [0x48,0xc7,0xc0,0xff,0xff,0xff,0xff]
; CHECK-NEXT: cmovaeq %rcx, %rax # encoding: [0x48,0x0f,0x43,0xc1]
; CHECK-NEXT: retq # encoding: [0xc3]
diff --git a/llvm/test/CodeGen/X86/apx/and.ll b/llvm/test/CodeGen/X86/apx/and.ll
index b7c1a851c07d63..af8f4119ac054d 100644
--- a/llvm/test/CodeGen/X86/apx/and.ll
+++ b/llvm/test/CodeGen/X86/apx/and.ll
@@ -90,7 +90,7 @@ entry:
define i16 @and16ri8(i16 noundef %a) {
; CHECK-LABEL: and16ri8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: andl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xe7,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: andl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xe7,0x7b]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
entry:
@@ -101,7 +101,7 @@ entry:
define i32 @and32ri8(i32 noundef %a) {
; CHECK-LABEL: and32ri8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: andl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xe7,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: andl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xe7,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
entry:
%and = and i32 %a, 123
@@ -111,7 +111,7 @@ entry:
define i64 @and64ri8(i64 noundef %a) {
; CHECK-LABEL: and64ri8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: andl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xe7,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: andl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xe7,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
entry:
%and = and i64 %a, 123
@@ -222,7 +222,7 @@ entry:
define i32 @and32mi8(ptr %a) {
; CHECK-LABEL: and32mi8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: andl $123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x27,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: andl $123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0x27,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
@@ -482,7 +482,7 @@ define i1 @andflag64ri(i64 %a) {
define i1 @andflag16ri8(i16 %a) {
; CHECK-LABEL: andflag16ri8:
; CHECK: # %bb.0:
-; CHECK-NEXT: andw $-124, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x81,0xe7,0x84,0xff]
+; CHECK-NEXT: andw $-124, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x83,0xe7,0x84]
; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
@@ -497,7 +497,7 @@ define i1 @andflag16ri8(i16 %a) {
define i1 @andflag32ri8(i32 %a) {
; CHECK-LABEL: andflag32ri8:
; CHECK: # %bb.0:
-; CHECK-NEXT: andl $123, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x81,0xe7,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: andl $123, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x83,0xe7,0x7b]
; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
; CHECK-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
@@ -511,7 +511,7 @@ define i1 @andflag32ri8(i32 %a) {
define i1 @andflag64ri8(i64 %a) {
; CHECK-LABEL: andflag64ri8:
; CHECK: # %bb.0:
-; CHECK-NEXT: andq $123, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x81,0xe7,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: andq $123, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x83,0xe7,0x7b]
; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
; CHECK-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
diff --git a/llvm/test/CodeGen/X86/apx/or.ll b/llvm/test/CodeGen/X86/apx/or.ll
index 1219e74074a96d..3d024e962400fa 100644
--- a/llvm/test/CodeGen/X86/apx/or.ll
+++ b/llvm/test/CodeGen/X86/apx/or.ll
@@ -90,7 +90,7 @@ entry:
define i16 @or16ri8(i16 noundef %a) {
; CHECK-LABEL: or16ri8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: orl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xcf,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: orl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xcf,0x7b]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
entry:
@@ -101,7 +101,7 @@ entry:
define i32 @or32ri8(i32 noundef %a) {
; CHECK-LABEL: or32ri8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: orl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xcf,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: orl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xcf,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
entry:
%or = or i32 %a, 123
@@ -111,7 +111,7 @@ entry:
define i64 @or64ri8(i64 noundef %a) {
; CHECK-LABEL: or64ri8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: orq $123, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xcf,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: orq $123, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0xcf,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
entry:
%or = or i64 %a, 123
@@ -222,7 +222,7 @@ entry:
define i32 @or32mi8(ptr %a) {
; CHECK-LABEL: or32mi8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: orl $123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x0f,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: orl $123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0x0f,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
@@ -233,7 +233,7 @@ entry:
define i64 @or64mi8(ptr %a) {
; CHECK-LABEL: or64mi8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: orq $123, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x0f,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: orq $123, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0x0f,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
entry:
%t= load i64, ptr %a
@@ -480,7 +480,7 @@ define i1 @orflag64ri(i64 %a) {
define i1 @orflag16ri8(i16 %a) {
; CHECK-LABEL: orflag16ri8:
; CHECK: # %bb.0:
-; CHECK-NEXT: orw $-124, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x81,0xcf,0x84,0xff]
+; CHECK-NEXT: orw $-124, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x83,0xcf,0x84]
; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
@@ -495,7 +495,7 @@ define i1 @orflag16ri8(i16 %a) {
define i1 @orflag32ri8(i32 %a) {
; CHECK-LABEL: orflag32ri8:
; CHECK: # %bb.0:
-; CHECK-NEXT: orl $123, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x81,0xcf,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: orl $123, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x83,0xcf,0x7b]
; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
; CHECK-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
@@ -509,7 +509,7 @@ define i1 @orflag32ri8(i32 %a) {
define i1 @orflag64ri8(i64 %a) {
; CHECK-LABEL: orflag64ri8:
; CHECK: # %bb.0:
-; CHECK-NEXT: orq $123, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x81,0xcf,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: orq $123, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x83,0xcf,0x7b]
; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
; CHECK-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
diff --git a/llvm/test/CodeGen/X86/apx/sbb.ll b/llvm/test/CodeGen/X86/apx/sbb.ll
index 755193588a7b01..a12e315745cadd 100644
--- a/llvm/test/CodeGen/X86/apx/sbb.ll
+++ b/llvm/test/CodeGen/X86/apx/sbb.ll
@@ -113,7 +113,7 @@ define i16 @sbb16ri8(i16 %a, i16 %x, i16 %y) nounwind {
; CHECK-LABEL: sbb16ri8:
; CHECK: # %bb.0:
; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2]
-; CHECK-NEXT: sbbw $0, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0xdf,0x00,0x00]
+; CHECK-NEXT: sbbw $0, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x83,0xdf,0x00]
; CHECK-NEXT: addl $-123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x85]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
@@ -128,7 +128,7 @@ define i32 @sbb32ri8(i32 %a, i32 %x, i32 %y) nounwind {
; CHECK-LABEL: sbb32ri8:
; CHECK: # %bb.0:
; CHECK-NEXT: subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2]
-; CHECK-NEXT: sbbl $0, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xdf,0x00,0x00,0x00,0x00]
+; CHECK-NEXT: sbbl $0, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xdf,0x00]
; CHECK-NEXT: addl $-123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x85]
; CHECK-NEXT: retq # encoding: [0xc3]
%s = sub i32 %a, 123
@@ -142,7 +142,7 @@ define i64 @sbb64ri8(i64 %a, i64 %x, i64 %y) nounwind {
; CHECK-LABEL: sbb64ri8:
; CHECK: # %bb.0:
; CHECK-NEXT: subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2]
-; CHECK-NEXT: sbbq $0, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xdf,0x00,0x00,0x00,0x00]
+; CHECK-NEXT: sbbq $0, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0xdf,0x00]
; CHECK-NEXT: addq $-123, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x83,0xc0,0x85]
; CHECK-NEXT: retq # encoding: [0xc3]
%s = sub i64 %a, 123
@@ -170,7 +170,7 @@ define i16 @sbb16ri(i16 %a, i16 %x, i16 %y) nounwind {
; CHECK-LABEL: sbb16ri:
; CHECK: # %bb.0:
; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2]
-; CHECK-NEXT: sbbw $0, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0xdf,0x00,0x00]
+; CHECK-NEXT: sbbw $0, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x83,0xdf,0x00]
; CHECK-NEXT: addl $-1234, %eax # EVEX TO LEGACY Compression encoding: [0x05,0x2e,0xfb,0xff,0xff]
; CHECK-NEXT: # imm = 0xFB2E
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
@@ -186,7 +186,7 @@ define i32 @sbb32ri(i32 %a, i32 %x, i32 %y) nounwind {
; CHECK-LABEL: sbb32ri:
; CHECK: # %bb.0:
; CHECK-NEXT: subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2]
-; CHECK-NEXT: sbbl $0, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xdf,0x00,0x00,0x00,0x00]
+; CHECK-NEXT: sbbl $0, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xdf,0x00]
; CHECK-NEXT: addl $-123456, %eax # EVEX TO LEGACY Compression encoding: [0x05,0xc0,0x1d,0xfe,0xff]
; CHECK-NEXT: # imm = 0xFFFE1DC0
; CHECK-NEXT: retq # encoding: [0xc3]
@@ -201,7 +201,7 @@ define i64 @sbb64ri(i64 %a, i64 %x, i64 %y) nounwind {
; CHECK-LABEL: sbb64ri:
; CHECK: # %bb.0:
; CHECK-NEXT: subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2]
-; CHECK-NEXT: sbbq $0, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xdf,0x00,0x00,0x00,0x00]
+; CHECK-NEXT: sbbq $0, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0xdf,0x00]
; CHECK-NEXT: addq $-123456, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x05,0xc0,0x1d,0xfe,0xff]
; CHECK-NEXT: # imm = 0xFFFE1DC0
; CHECK-NEXT: retq # encoding: [0xc3]
@@ -272,7 +272,7 @@ define i16 @sbb16mi8(ptr %ptr, i16 %x, i16 %y) nounwind {
; CHECK-LABEL: sbb16mi8:
; CHECK: # %bb.0:
; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2]
-; CHECK-NEXT: sbbw $0, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0x1f,0x00,0x00]
+; CHECK-NEXT: sbbw $0, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x83,0x1f,0x00]
; CHECK-NEXT: addl $-123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x85]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
@@ -288,7 +288,7 @@ define i32 @sbb32mi8(ptr %ptr, i32 %x, i32 %y) nounwind {
; CHECK-LABEL: sbb32mi8:
; CHECK: # %bb.0:
; CHECK-NEXT: subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2]
-; CHECK-NEXT: sbbl $0, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x1f,0x00,0x00,0x00,0x00]
+; CHECK-NEXT: sbbl $0, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0x1f,0x00]
; CHECK-NEXT: addl $-123, %eax # EVEX TO LEGACY Compression encoding: [0x83,0xc0,0x85]
; CHECK-NEXT: retq # encoding: [0xc3]
%a = load i32, ptr %ptr
@@ -303,7 +303,7 @@ define i64 @sbb64mi8(ptr %ptr, i64 %x, i64 %y) nounwind {
; CHECK-LABEL: sbb64mi8:
; CHECK: # %bb.0:
; CHECK-NEXT: subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2]
-; CHECK-NEXT: sbbq $0, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x1f,0x00,0x00,0x00,0x00]
+; CHECK-NEXT: sbbq $0, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0x1f,0x00]
; CHECK-NEXT: addq $-123, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x83,0xc0,0x85]
; CHECK-NEXT: retq # encoding: [0xc3]
%a = load i64, ptr %ptr
@@ -333,7 +333,7 @@ define i16 @sbb16mi(ptr %ptr, i16 %x, i16 %y) nounwind {
; CHECK-LABEL: sbb16mi:
; CHECK: # %bb.0:
; CHECK-NEXT: subw %si, %dx, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x29,0xf2]
-; CHECK-NEXT: sbbw $0, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0x1f,0x00,0x00]
+; CHECK-NEXT: sbbw $0, (%rdi), %ax # encoding: [0x62,0xf4,0x7d,0x18,0x83,0x1f,0x00]
; CHECK-NEXT: addl $-1234, %eax # EVEX TO LEGACY Compression encoding: [0x05,0x2e,0xfb,0xff,0xff]
; CHECK-NEXT: # imm = 0xFB2E
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
@@ -350,7 +350,7 @@ define i32 @sbb32mi(ptr %ptr, i32 %x, i32 %y) nounwind {
; CHECK-LABEL: sbb32mi:
; CHECK: # %bb.0:
; CHECK-NEXT: subl %esi, %edx, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x29,0xf2]
-; CHECK-NEXT: sbbl $0, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x1f,0x00,0x00,0x00,0x00]
+; CHECK-NEXT: sbbl $0, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0x1f,0x00]
; CHECK-NEXT: addl $-123456, %eax # EVEX TO LEGACY Compression encoding: [0x05,0xc0,0x1d,0xfe,0xff]
; CHECK-NEXT: # imm = 0xFFFE1DC0
; CHECK-NEXT: retq # encoding: [0xc3]
@@ -366,7 +366,7 @@ define i64 @sbb64mi(ptr %ptr, i64 %x, i64 %y) nounwind {
; CHECK-LABEL: sbb64mi:
; CHECK: # %bb.0:
; CHECK-NEXT: subq %rsi, %rdx, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x29,0xf2]
-; CHECK-NEXT: sbbq $0, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x1f,0x00,0x00,0x00,0x00]
+; CHECK-NEXT: sbbq $0, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0x1f,0x00]
; CHECK-NEXT: addq $-123456, %rax # EVEX TO LEGACY Compression encoding: [0x48,0x05,0xc0,0x1d,0xfe,0xff]
; CHECK-NEXT: # imm = 0xFFFE1DC0
; CHECK-NEXT: retq # encoding: [0xc3]
diff --git a/llvm/test/CodeGen/X86/apx/sub.ll b/llvm/test/CodeGen/X86/apx/sub.ll
index aaf45c6b499c2b..b7c13b8e1b22ee 100644
--- a/llvm/test/CodeGen/X86/apx/sub.ll
+++ b/llvm/test/CodeGen/X86/apx/sub.ll
@@ -89,7 +89,7 @@ entry:
define i16 @sub16ri8(i16 noundef %a) {
; CHECK-LABEL: sub16ri8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addl $-123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xc7,0x85,0xff,0xff,0xff]
+; CHECK-NEXT: addl $-123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xc7,0x85]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
entry:
@@ -100,7 +100,7 @@ entry:
define i32 @sub32ri8(i32 noundef %a) {
; CHECK-LABEL: sub32ri8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addl $-123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xc7,0x85,0xff,0xff,0xff]
+; CHECK-NEXT: addl $-123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xc7,0x85]
; CHECK-NEXT: retq # encoding: [0xc3]
entry:
%sub = sub i32 %a, 123
@@ -110,7 +110,7 @@ entry:
define i64 @sub64ri8(i64 noundef %a) {
; CHECK-LABEL: sub64ri8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addq $-123, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xc7,0x85,0xff,0xff,0xff]
+; CHECK-NEXT: addq $-123, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0xc7,0x85]
; CHECK-NEXT: retq # encoding: [0xc3]
entry:
%sub = sub i64 %a, 123
@@ -223,7 +223,7 @@ entry:
define i32 @sub32mi8(ptr %a) {
; CHECK-LABEL: sub32mi8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addl $-123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x07,0x85,0xff,0xff,0xff]
+; CHECK-NEXT: addl $-123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0x07,0x85]
; CHECK-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
@@ -234,7 +234,7 @@ entry:
define i64 @sub64mi8(ptr %a) {
; CHECK-LABEL: sub64mi8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: addq $-123, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x07,0x85,0xff,0xff,0xff]
+; CHECK-NEXT: addq $-123, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0x07,0x85]
; CHECK-NEXT: retq # encoding: [0xc3]
entry:
%t= load i64, ptr %a
@@ -406,7 +406,7 @@ define i16 @subflag16ri8(i16 noundef %a) {
; CHECK-LABEL: subflag16ri8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorl %ecx, %ecx # encoding: [0x31,0xc9]
-; CHECK-NEXT: subw $123, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x81,0xef,0x7b,0x00]
+; CHECK-NEXT: subw $123, %di, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x83,0xef,0x7b]
; CHECK-NEXT: cmovbl %ecx, %eax # encoding: [0x0f,0x42,0xc1]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
@@ -419,7 +419,7 @@ define i32 @subflag32ri8(i32 noundef %a) {
; CHECK-LABEL: subflag32ri8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorl %ecx, %ecx # encoding: [0x31,0xc9]
-; CHECK-NEXT: subl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xef,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: subl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xef,0x7b]
; CHECK-NEXT: cmovbl %ecx, %eax # encoding: [0x0f,0x42,0xc1]
; CHECK-NEXT: retq # encoding: [0xc3]
entry:
@@ -431,7 +431,7 @@ define i64 @subflag64ri8(i64 noundef %a) {
; CHECK-LABEL: subflag64ri8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorl %eax, %eax # encoding: [0x31,0xc0]
-; CHECK-NEXT: subq $123, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x81,0xef,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: subq $123, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x83,0xef,0x7b]
; CHECK-NEXT: cmovaeq %rcx, %rax # encoding: [0x48,0x0f,0x43,0xc1]
; CHECK-NEXT: retq # encoding: [0xc3]
entry:
diff --git a/llvm/test/CodeGen/X86/apx/xor.ll b/llvm/test/CodeGen/X86/apx/xor.ll
index d75f9f34d7b68d..d203fbb02782ab 100644
--- a/llvm/test/CodeGen/X86/apx/xor.ll
+++ b/llvm/test/CodeGen/X86/apx/xor.ll
@@ -90,7 +90,7 @@ entry:
define i16 @xor16ri8(i16 noundef %a) {
; CHECK-LABEL: xor16ri8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: xorl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xf7,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: xorl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xf7,0x7b]
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq # encoding: [0xc3]
entry:
@@ -101,7 +101,7 @@ entry:
define i32 @xor32ri8(i32 noundef %a) {
; CHECK-LABEL: xor32ri8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: xorl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0xf7,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: xorl $123, %edi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0xf7,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
entry:
%xor = xor i32 %a, 123
@@ -111,7 +111,7 @@ entry:
define i64 @xor64ri8(i64 noundef %a) {
; CHECK-LABEL: xor64ri8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: xorq $123, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0xf7,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: xorq $123, %rdi, %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0xf7,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
entry:
%xor = xor i64 %a, 123
@@ -222,7 +222,7 @@ entry:
define i32 @xor32mi8(ptr %a) {
; CHECK-LABEL: xor32mi8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: xorl $123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x81,0x37,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: xorl $123, (%rdi), %eax # encoding: [0x62,0xf4,0x7c,0x18,0x83,0x37,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
entry:
%t= load i32, ptr %a
@@ -233,7 +233,7 @@ entry:
define i64 @xor64mi8(ptr %a) {
; CHECK-LABEL: xor64mi8:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: xorq $123, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x81,0x37,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: xorq $123, (%rdi), %rax # encoding: [0x62,0xf4,0xfc,0x18,0x83,0x37,0x7b]
; CHECK-NEXT: retq # encoding: [0xc3]
entry:
%t= load i64, ptr %a
@@ -312,7 +312,7 @@ define i1 @xorflag16rr(i16 %a, i16 %b) {
; CHECK-LABEL: xorflag16rr:
; CHECK: # %bb.0:
; CHECK-NEXT: xorl %edi, %esi, %eax # encoding: [0x62,0xf4,0x7c,0x18,0x31,0xfe]
-; CHECK-NEXT: xorw $-1, %ax, %cx # encoding: [0x62,0xf4,0x75,0x18,0x81,0xf0,0xff,0xff]
+; CHECK-NEXT: xorw $-1, %ax, %cx # encoding: [0x62,0xf4,0x75,0x18,0x83,0xf0,0xff]
; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
@@ -373,7 +373,7 @@ define i1 @xorflag16rm(ptr %ptr, i16 %b) {
; CHECK-LABEL: xorflag16rm:
; CHECK: # %bb.0:
; CHECK-NEXT: xorw (%rdi), %si, %ax # encoding: [0x62,0xf4,0x7d,0x18,0x33,0x37]
-; CHECK-NEXT: xorw $-1, %ax, %cx # encoding: [0x62,0xf4,0x75,0x18,0x81,0xf0,0xff,0xff]
+; CHECK-NEXT: xorw $-1, %ax, %cx # encoding: [0x62,0xf4,0x75,0x18,0x83,0xf0,0xff]
; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
@@ -480,7 +480,7 @@ define i1 @xorflag64ri(i64 %a) {
define i1 @xorflag16ri8(i16 %a) {
; CHECK-LABEL: xorflag16ri8:
; CHECK: # %bb.0:
-; CHECK-NEXT: xorw $-124, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x81,0xf7,0x84,0xff]
+; CHECK-NEXT: xorw $-124, %di, %cx # encoding: [0x62,0xf4,0x75,0x18,0x83,0xf7,0x84]
; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
; CHECK-NEXT: movw %cx, d64(%rip) # encoding: [0x66,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
@@ -495,7 +495,7 @@ define i1 @xorflag16ri8(i16 %a) {
define i1 @xorflag32ri8(i32 %a) {
; CHECK-LABEL: xorflag32ri8:
; CHECK: # %bb.0:
-; CHECK-NEXT: xorl $123, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x81,0xf7,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: xorl $123, %edi, %ecx # encoding: [0x62,0xf4,0x74,0x18,0x83,0xf7,0x7b]
; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
; CHECK-NEXT: movl %ecx, d64(%rip) # encoding: [0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 2, value: d64-4, kind: reloc_riprel_4byte
@@ -509,7 +509,7 @@ define i1 @xorflag32ri8(i32 %a) {
define i1 @xorflag64ri8(i64 %a) {
; CHECK-LABEL: xorflag64ri8:
; CHECK: # %bb.0:
-; CHECK-NEXT: xorq $123, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x81,0xf7,0x7b,0x00,0x00,0x00]
+; CHECK-NEXT: xorq $123, %rdi, %rcx # encoding: [0x62,0xf4,0xf4,0x18,0x83,0xf7,0x7b]
; CHECK-NEXT: sete %al # encoding: [0x0f,0x94,0xc0]
; CHECK-NEXT: movq %rcx, d64(%rip) # encoding: [0x48,0x89,0x0d,A,A,A,A]
; CHECK-NEXT: # fixup A - offset: 3, value: d64-4, kind: reloc_riprel_4byte
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