[llvm] [AMDGPU] Allocate i1 argument to SGPRs (PR #72461)
Jun Wang via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 17 10:35:22 PST 2024
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@@ -124,7 +124,15 @@ struct AMDGPUIncomingArgHandler : public CallLowering::IncomingValueHandler {
if (VA.getLocVT().getSizeInBits() < 32) {
// 16-bit types are reported as legal for 32-bit registers. We need to do
// a 32-bit copy, and truncate to avoid the verifier complaining about it.
- auto Copy = MIRBuilder.buildCopy(LLT::scalar(32), PhysReg);
+ unsigned CopyToBits = 32;
+
+ // When function return type is i1, it may be in a 64b register.
+ if (VA.getLocVT().getSizeInBits() == 1) {
+ if (MRI.getTargetRegisterInfo()->getRegSizeInBits(PhysReg, MRI) == 64)
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jwanggit86 wrote:
Ok then!
https://github.com/llvm/llvm-project/pull/72461
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