[llvm] [LLVM][AArch64]Use load/store with consecutive registers in SME2 or S… (PR #77665)

[Momchil Velikov via llvm-commits]

================
@@ -0,0 +1,295 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
----------------
momchil-velikov wrote:

The name of the file is not appropriate as we don't even mention intrinsics. Something like `sve-callee-save-restore-pairs.ll` would fit better.

https://github.com/llvm/llvm-project/pull/77665