[llvm] [AMDGPU] Work around s_getpc_b64 zero extending on GFX12 (PR #78186)
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 17 07:42:39 PST 2024
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@@ -292,8 +292,11 @@ def S_BITSET0_B64 : SOP1_64_32 <"s_bitset0_b64", [], 1>;
def S_BITSET1_B32 : SOP1_32 <"s_bitset1_b32", [], 1>;
def S_BITSET1_B64 : SOP1_64_32 <"s_bitset1_b64", [], 1>;
+def S_GETPC_B64 : SOP1_64_0 <"s_getpc_b64">;
+// PSEUDO includes a workaround for a hardware anomaly where some ASICs
+// zero-extend the result from 48 bits instead of sign-extending.
let isReMaterializable = 1 in
-def S_GETPC_B64 : SOP1_64_0 <"s_getpc_b64",
+def S_GETPC_B64_PSEUDO : SOP1_64_0 <"s_getpc_b64",
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jayfoad wrote:
Done, although the majority of existing cases use uppercase.
https://github.com/llvm/llvm-project/pull/78186
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