[llvm] 59cdf41 - [AMDGPU] Do not run GCNNSAReassign pass for GFX12 (#78185)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 17 07:22:53 PST 2024
Author: Jay Foad
Date: 2024-01-17T15:22:48Z
New Revision: 59cdf41f077661cd2178123cf27dc688823b6b0f
URL: https://github.com/llvm/llvm-project/commit/59cdf41f077661cd2178123cf27dc688823b6b0f
DIFF: https://github.com/llvm/llvm-project/commit/59cdf41f077661cd2178123cf27dc688823b6b0f.diff
LOG: [AMDGPU] Do not run GCNNSAReassign pass for GFX12 (#78185)
GFX12 does not have separate NSA and non-NSA encodings.
---------
Co-authored-by: Mirko Brkusanin <Mirko.Brkusanin at amd.com>
Added:
Modified:
llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
llvm/lib/Target/AMDGPU/GCNSubtarget.h
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp b/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
index 4c9ad9b5bcf757..272cc7fa6bc667 100644
--- a/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
@@ -237,7 +237,7 @@ GCNNSAReassign::CheckNSA(const MachineInstr &MI, bool Fast) const {
bool GCNNSAReassign::runOnMachineFunction(MachineFunction &MF) {
ST = &MF.getSubtarget<GCNSubtarget>();
- if (!ST->hasNSAEncoding())
+ if (!ST->hasNSAEncoding() || !ST->hasNonNSAEncoding())
return false;
MRI = &MF.getRegInfo();
diff --git a/llvm/lib/Target/AMDGPU/GCNSubtarget.h b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
index e53619257c3ee4..d4d31b15cf2b81 100644
--- a/llvm/lib/Target/AMDGPU/GCNSubtarget.h
+++ b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
@@ -1002,6 +1002,8 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
bool hasNSAEncoding() const { return HasNSAEncoding; }
+ bool hasNonNSAEncoding() const { return getGeneration() < GFX12; }
+
bool hasPartialNSAEncoding() const { return HasPartialNSAEncoding; }
unsigned getNSAMaxSize(bool HasSampler = false) const {
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