[llvm] [SVE] Wide active lane mask (PR #76514)

[Momchil Velikov via llvm-commits]

================
@@ -1081,9 +1080,8 @@ static VPActiveLaneMaskPHIRecipe *addVPLaneMaskPhiAndUpdateExitBranch(
       "index.part.next");
 
   // Create the active lane mask instruction in the VPlan preheader.
-  auto *EntryALM =
-      Builder.createNaryOp(VPInstruction::ActiveLaneMask, {EntryIncrement, TC},
-                           DL, "active.lane.mask.entry");
+  auto *EntryALM = Builder.createGetActiveLaneMask(EntryIncrement, TC, DL,
----------------
momchil-velikov wrote:

The expansion from VPlan to LLVM IR of instructions like
```
  EMIT vp<%3> = TC > VF ? TC - VF : 0 ir<%n>
  EMIT vp<%4> = VF * Part + ir<0>
```
indeed in some cases may result in dead instructions, since it does not depend and has no knowledge of the logic of expansion of things like
```
EMIT vp<%17> = active lane mask vp<%16>, vp<%3>
```
and I want to keep it that way.


https://github.com/llvm/llvm-project/pull/76514