[llvm] [AMDGPU] Do not run GCNNSAReassign pass for GFX12 (PR #78185)
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 17 05:29:59 PST 2024
https://github.com/jayfoad updated https://github.com/llvm/llvm-project/pull/78185
>From 1eac82e1f04ed3036fcc62609bff86556d6cc93a Mon Sep 17 00:00:00 2001
From: Mirko Brkusanin <Mirko.Brkusanin at amd.com>
Date: Fri, 17 Mar 2023 17:50:39 +0100
Subject: [PATCH 1/2] [AMDGPU] Do not run GCNNSAReassign pass for GFX12
GFX12 does not have separate NSA and non-NSA encodings.
---
llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp b/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
index 4c9ad9b5bcf757..f87ff2d407e145 100644
--- a/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
@@ -237,7 +237,7 @@ GCNNSAReassign::CheckNSA(const MachineInstr &MI, bool Fast) const {
bool GCNNSAReassign::runOnMachineFunction(MachineFunction &MF) {
ST = &MF.getSubtarget<GCNSubtarget>();
- if (!ST->hasNSAEncoding())
+ if (!ST->hasNSAEncoding() || ST->getGeneration() > GCNSubtarget::GFX11)
return false;
MRI = &MF.getRegInfo();
>From e877830f8507ee71a571cc93914d1e2dde84c212 Mon Sep 17 00:00:00 2001
From: Jay Foad <jay.foad at amd.com>
Date: Wed, 17 Jan 2024 13:27:49 +0000
Subject: [PATCH 2/2] Add hasNonNSAEncoding
---
llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp | 2 +-
llvm/lib/Target/AMDGPU/GCNSubtarget.h | 4 ++++
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp b/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
index f87ff2d407e145..272cc7fa6bc667 100644
--- a/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
@@ -237,7 +237,7 @@ GCNNSAReassign::CheckNSA(const MachineInstr &MI, bool Fast) const {
bool GCNNSAReassign::runOnMachineFunction(MachineFunction &MF) {
ST = &MF.getSubtarget<GCNSubtarget>();
- if (!ST->hasNSAEncoding() || ST->getGeneration() > GCNSubtarget::GFX11)
+ if (!ST->hasNSAEncoding() || !ST->hasNonNSAEncoding())
return false;
MRI = &MF.getRegInfo();
diff --git a/llvm/lib/Target/AMDGPU/GCNSubtarget.h b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
index 070d165cdaadb8..45d0d3919a42a5 100644
--- a/llvm/lib/Target/AMDGPU/GCNSubtarget.h
+++ b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
@@ -992,6 +992,10 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
bool hasNSAEncoding() const { return HasNSAEncoding; }
+ bool hasNonNSAEncoding() const {
+ return getGeneration() < GFX12;
+ }
+
bool hasPartialNSAEncoding() const { return HasPartialNSAEncoding; }
unsigned getNSAMaxSize(bool HasSampler = false) const {
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