[llvm] cee60a8 - [RISCV] Remove dead early exit in performCombineVMergeAndVOps. NFC

[Luke Lau via llvm-commits]

Author: Luke Lau
Date: 2024-01-17T19:28:26+07:00
New Revision: cee60a80101dbc2494865910fc7acef4fcab42bd

URL: https://github.com/llvm/llvm-project/commit/cee60a80101dbc2494865910fc7acef4fcab42bd
DIFF: https://github.com/llvm/llvm-project/commit/cee60a80101dbc2494865910fc7acef4fcab42bd.diff

LOG: [RISCV] Remove dead early exit in performCombineVMergeAndVOps. NFC

Because a masked instruction always has a tied dest (because it has a
passthru), the early exit if Merge is an implicit def will have always already
been taken in the branch above that handles HasTiedDest.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
index 0d8688ba2eaeaf..df5766a294c982 100644
--- a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
+++ b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
@@ -3545,9 +3545,6 @@ bool RISCVDAGToDAGISel::performCombineVMergeAndVOps(SDNode *N) {
 
   if (IsMasked) {
     assert(HasTiedDest && "Expected tied dest");
-    // The vmerge instruction must be TU.
-    if (isImplicitDef(Merge))
-      return false;
     // The vmerge instruction must have an all 1s mask since we're going to keep
     // the mask from the True instruction.
     // FIXME: Support mask agnostic True instruction which would have an