[llvm] a3fc0f9 - [AMDGPU] Add comments on SITargetLowering::widenLoad

[Jay Foad via llvm-commits]

Author: Jay Foad
Date: 2024-01-17T10:40:24Z
New Revision: a3fc0f9d2b73b2bf6afbf420d204ab30253ebf33

URL: https://github.com/llvm/llvm-project/commit/a3fc0f9d2b73b2bf6afbf420d204ab30253ebf33
DIFF: https://github.com/llvm/llvm-project/commit/a3fc0f9d2b73b2bf6afbf420d204ab30253ebf33.diff

LOG: [AMDGPU] Add comments on SITargetLowering::widenLoad

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 3f1031176d0a0b..a888ea98ff39de 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -9884,6 +9884,8 @@ static SDValue getLoadExtOrTrunc(SelectionDAG &DAG,
   llvm_unreachable("invalid ext type");
 }
 
+// Try to turn 8 and 16-bit scalar loads into SMEM eligible 32-bit loads.
+// TODO: Skip this on GFX12 which does have scalar sub-dword loads.
 SDValue SITargetLowering::widenLoad(LoadSDNode *Ld, DAGCombinerInfo &DCI) const {
   SelectionDAG &DAG = DCI.DAG;
   if (Ld->getAlign() < Align(4) || Ld->isDivergent())