[llvm] [RISCV][ISel] Remove redundant vmerge for the vwadd. (PR #78403)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 16 23:57:39 PST 2024
================
@@ -13457,6 +13457,56 @@ combineBinOp_VLToVWBinOp_VL(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) {
return InputRootReplacement;
}
+// (vwadd y, (select cond, x, 0)) -> select cond (vwadd y, x), y
+static SDValue combineVWADDSelect(SDNode *N, SelectionDAG &DAG) {
+ unsigned Opc = N->getOpcode();
+ assert(Opc == RISCVISD::VWADD_VL || Opc == RISCVISD::VWADD_W_VL ||
+ Opc == RISCVISD::VWADDU_W_VL);
+
+ SDValue VL = N->getOperand(4);
+ SDValue Y = N->getOperand(0);
+ SDValue Merge = N->getOperand(1);
+
+ if (Merge.getOpcode() != RISCVISD::VMERGE_VL)
+ return SDValue();
+
+ SDValue Cond = Merge->getOperand(0);
+ SDValue X = Merge->getOperand(1);
+ SDValue Z = Merge->getOperand(2);
+
+ if (Z.getOpcode() != ISD::INSERT_SUBVECTOR ||
+ !isNullConstant(Z.getOperand(2)))
+ return SDValue();
+
+ if (!Merge.hasOneUse())
+ return SDValue();
+
+ SmallVector<SDValue, 6> Ops(N->op_values());
+ Ops[0] = Y;
+ Ops[1] = X;
+
+ SDLoc DL(N);
+ EVT VT = N->getValueType(0);
+
+ SDValue WX = DAG.getNode(Opc, DL, VT, Ops, N->getFlags());
+ return DAG.getNode(RISCVISD::VMERGE_VL, DL, VT, Cond, WX, Y, DAG.getUNDEF(VT),
----------------
topperc wrote:
Operand 2 of the original vmerge is the passthru operand for elements past VL if the VWADD is tail undisturbed. This VMERGE_VL has undef for its passthru. That corrupts the elements past VL.
https://github.com/llvm/llvm-project/pull/78403
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