[llvm] [RISCV][GISel] RegBank select and instruction select for vector G_ADD, G_SUB (PR #74114)

Michael Maitland via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 16 10:50:04 PST 2024

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michaelmaitland wrote:

This patch could use a rebase and an update to the PR description.

https://github.com/llvm/llvm-project/pull/74114

Previous message: [clang-tools-extra] [clang] [compiler-rt] [llvm] [flang] [libcxx] [lldb] [lld] [libc] [AArch64][SME2] Preserve ZT0 state around function calls (PR #78321)
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