[llvm] [GlobalIsel][AArch64] more legal icmps (PR #78239)

[David Green via llvm-commits]

Thorsten =?utf-8?q?Schütt?= <schuett at gmail.com>
Message-ID:
In-Reply-To: <llvm.org/llvm/llvm-project/pull/78239 at github.com>


================
@@ -5314,6 +5314,14 @@ LegalizerHelper::moreElementsVector(MachineInstr &MI, unsigned TypeIdx,
     Observer.changedInstr(MI);
     return Legalized;
   }
+  case TargetOpcode::G_ICMP: {
+    Observer.changingInstr(MI);
+    moreElementsVectorSrc(MI, MoreTy, 2);
+    moreElementsVectorSrc(MI, MoreTy, 3);
+    moreElementsVectorDst(MI, MoreTy, 0);
----------------
davemgreen wrote:

I'm not sure how much this matters, but this looks like it is assuming that the three types are all the same, not that one is a predicate vector (i1 elements). Neon will work with full vector lane mask results, so it should work OK there, but possible not for other architectures with vector predicate register like SVE and MVE.

https://github.com/llvm/llvm-project/pull/78239