[llvm] [X86] Support lowering for APX promoted BMI instructions. (PR #77433)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 16 05:12:36 PST 2024
================
@@ -879,30 +879,7 @@ let Predicates = [HasBMI2, HasEGPR, In64BitMode] in {
defm SHLX64 : bmi_shift<"shlx{q}", GR64, i64mem, "_EVEX">, T8, PD, REX_W, EVEX;
}
-let Predicates = [HasBMI2] in {
- // Prefer RORX which is non-destructive and doesn't update EFLAGS.
- let AddedComplexity = 10 in {
- def : Pat<(rotr GR32:$src, (i8 imm:$shamt)),
- (RORX32ri GR32:$src, imm:$shamt)>;
- def : Pat<(rotr GR64:$src, (i8 imm:$shamt)),
- (RORX64ri GR64:$src, imm:$shamt)>;
-
- def : Pat<(rotl GR32:$src, (i8 imm:$shamt)),
- (RORX32ri GR32:$src, (ROT32L2R_imm8 imm:$shamt))>;
- def : Pat<(rotl GR64:$src, (i8 imm:$shamt)),
- (RORX64ri GR64:$src, (ROT64L2R_imm8 imm:$shamt))>;
- }
-
- def : Pat<(rotr (loadi32 addr:$src), (i8 imm:$shamt)),
- (RORX32mi addr:$src, imm:$shamt)>;
- def : Pat<(rotr (loadi64 addr:$src), (i8 imm:$shamt)),
- (RORX64mi addr:$src, imm:$shamt)>;
-
- def : Pat<(rotl (loadi32 addr:$src), (i8 imm:$shamt)),
- (RORX32mi addr:$src, (ROT32L2R_imm8 imm:$shamt))>;
- def : Pat<(rotl (loadi64 addr:$src), (i8 imm:$shamt)),
- (RORX64mi addr:$src, (ROT64L2R_imm8 imm:$shamt))>;
-
+multiclass bmi_shift_Pats<SDNode op, string suffix = ""> {
----------------
RKSimon wrote:
`bmi_shift_pats`
https://github.com/llvm/llvm-project/pull/77433
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