[llvm] [AMDGPU] Do not generate s_set_inst_prefetch_distance for GFX12 (PR #78190)
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 15 08:49:54 PST 2024
https://github.com/jayfoad created https://github.com/llvm/llvm-project/pull/78190
GFX12 can still encode the s_set_inst_prefetch_distance instruction but
it has no effect.
>From b2618ccf616a68cbbedab863d1c3b2228b8012b4 Mon Sep 17 00:00:00 2001
From: Jay Foad <jay.foad at amd.com>
Date: Mon, 15 Jan 2024 13:50:18 +0000
Subject: [PATCH 1/2] Precommit GFX12 test coverage
---
.../CodeGen/AMDGPU/no-dup-inst-prefetch.ll | 53 +++++++++++++++++++
1 file changed, 53 insertions(+)
diff --git a/llvm/test/CodeGen/AMDGPU/no-dup-inst-prefetch.ll b/llvm/test/CodeGen/AMDGPU/no-dup-inst-prefetch.ll
index c0d276f5d88cf7..82c3a5e030e951 100644
--- a/llvm/test/CodeGen/AMDGPU/no-dup-inst-prefetch.ll
+++ b/llvm/test/CodeGen/AMDGPU/no-dup-inst-prefetch.ll
@@ -1,5 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -march=amdgcn -mcpu=gfx1030 -verify-machineinstrs < %s | FileCheck --check-prefix=GFX10 %s
+; RUN: llc -march=amdgcn -mcpu=gfx1200 -verify-machineinstrs < %s | FileCheck --check-prefix=GFX12 %s
define amdgpu_cs void @_amdgpu_cs_main(float %0, i32 %1) {
; GFX10-LABEL: _amdgpu_cs_main:
@@ -50,6 +51,58 @@ define amdgpu_cs void @_amdgpu_cs_main(float %0, i32 %1) {
; GFX10-NEXT: .LBB0_4: ; %loop0_merge
; GFX10-NEXT: s_inst_prefetch 0x2
; GFX10-NEXT: s_endpgm
+;
+; GFX12-LABEL: _amdgpu_cs_main:
+; GFX12: ; %bb.0: ; %branch1_true
+; GFX12-NEXT: v_mov_b32_e32 v2, 0
+; GFX12-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v1
+; GFX12-NEXT: v_mov_b32_e32 v1, 0
+; GFX12-NEXT: s_mov_b32 s4, 0
+; GFX12-NEXT: s_mov_b32 s1, 0
+; GFX12-NEXT: ; implicit-def: $sgpr2
+; GFX12-NEXT: s_set_inst_prefetch_distance 0x1
+; GFX12-NEXT: s_branch .LBB0_2
+; GFX12-NEXT: .p2align 6
+; GFX12-NEXT: .LBB0_1: ; %Flow
+; GFX12-NEXT: ; in Loop: Header=BB0_2 Depth=1
+; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s3
+; GFX12-NEXT: v_mov_b32_e32 v1, v0
+; GFX12-NEXT: s_and_b32 s0, exec_lo, s2
+; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
+; GFX12-NEXT: s_or_b32 s1, s0, s1
+; GFX12-NEXT: s_and_not1_b32 exec_lo, exec_lo, s1
+; GFX12-NEXT: s_cbranch_execz .LBB0_4
+; GFX12-NEXT: .LBB0_2: ; %bb
+; GFX12-NEXT: ; =>This Inner Loop Header: Depth=1
+; GFX12-NEXT: s_or_b32 s2, s2, exec_lo
+; GFX12-NEXT: s_and_saveexec_b32 s3, vcc_lo
+; GFX12-NEXT: s_cbranch_execz .LBB0_1
+; GFX12-NEXT: ; %bb.3: ; %branch2_merge
+; GFX12-NEXT: ; in Loop: Header=BB0_2 Depth=1
+; GFX12-NEXT: s_mov_b32 s5, s4
+; GFX12-NEXT: s_mov_b32 s6, s4
+; GFX12-NEXT: s_mov_b32 s7, s4
+; GFX12-NEXT: s_mov_b32 s8, s4
+; GFX12-NEXT: s_mov_b32 s9, s4
+; GFX12-NEXT: s_mov_b32 s10, s4
+; GFX12-NEXT: s_mov_b32 s11, s4
+; GFX12-NEXT: s_mov_b32 s12, s4
+; GFX12-NEXT: s_mov_b32 s13, s4
+; GFX12-NEXT: s_mov_b32 s14, s4
+; GFX12-NEXT: s_mov_b32 s15, s4
+; GFX12-NEXT: s_and_not1_b32 s2, s2, exec_lo
+; GFX12-NEXT: image_sample_lz v1, [v2, v2, v1], s[8:15], s[4:7] dmask:0x1 dim:SQ_RSRC_IMG_3D
+; GFX12-NEXT: s_waitcnt vmcnt(0)
+; GFX12-NEXT: v_fma_f32 v1, v1, v0, 0
+; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)
+; GFX12-NEXT: v_cmp_le_f32_e64 s0, 0, v1
+; GFX12-NEXT: s_and_b32 s0, s0, exec_lo
+; GFX12-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
+; GFX12-NEXT: s_or_b32 s2, s2, s0
+; GFX12-NEXT: s_branch .LBB0_1
+; GFX12-NEXT: .LBB0_4: ; %loop0_merge
+; GFX12-NEXT: s_set_inst_prefetch_distance 0x2
+; GFX12-NEXT: s_endpgm
branch1_true:
br label %bb
>From 0e3421baf20eb40b9da83c995da776d37dc2d247 Mon Sep 17 00:00:00 2001
From: Jay Foad <jay.foad at amd.com>
Date: Mon, 15 Jan 2024 13:46:43 +0000
Subject: [PATCH 2/2] [AMDGPU] Do not generate s_set_inst_prefetch_distance for
GFX12
GFX12 can still encode the s_set_inst_prefetch_distance instruction but
it has no effect.
---
llvm/lib/Target/AMDGPU/GCNSubtarget.h | 6 +++++-
llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll | 1 -
llvm/test/CodeGen/AMDGPU/no-dup-inst-prefetch.ll | 3 ---
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/GCNSubtarget.h b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
index 070d165cdaadb8..c825ea96b0fe43 100644
--- a/llvm/lib/Target/AMDGPU/GCNSubtarget.h
+++ b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
@@ -846,7 +846,11 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
return getGeneration() < SEA_ISLANDS;
}
- bool hasInstPrefetch() const { return getGeneration() >= GFX10; }
+ bool hasInstPrefetch() const {
+ // GFX12 can still encode the s_set_inst_prefetch_distance instruction but
+ // it has no effect.
+ return getGeneration() == GFX10 || getGeneration() == GFX11;
+ }
bool hasPrefetch() const { return GFX12Insts; }
diff --git a/llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll b/llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
index fb3c04235b8e4d..02faca2cc191ce 100644
--- a/llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
+++ b/llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
@@ -12,7 +12,6 @@ define amdgpu_kernel void @copy_flat(ptr nocapture %d, ptr nocapture readonly %s
; GCN-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: s_add_nc_u64 s[2:3], s[2:3], 0xb0
-; GCN-NEXT: .p2align 6
; GCN-NEXT: .LBB0_2: ; %for.body
; GCN-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
diff --git a/llvm/test/CodeGen/AMDGPU/no-dup-inst-prefetch.ll b/llvm/test/CodeGen/AMDGPU/no-dup-inst-prefetch.ll
index 82c3a5e030e951..5741a7b3851d5d 100644
--- a/llvm/test/CodeGen/AMDGPU/no-dup-inst-prefetch.ll
+++ b/llvm/test/CodeGen/AMDGPU/no-dup-inst-prefetch.ll
@@ -60,9 +60,7 @@ define amdgpu_cs void @_amdgpu_cs_main(float %0, i32 %1) {
; GFX12-NEXT: s_mov_b32 s4, 0
; GFX12-NEXT: s_mov_b32 s1, 0
; GFX12-NEXT: ; implicit-def: $sgpr2
-; GFX12-NEXT: s_set_inst_prefetch_distance 0x1
; GFX12-NEXT: s_branch .LBB0_2
-; GFX12-NEXT: .p2align 6
; GFX12-NEXT: .LBB0_1: ; %Flow
; GFX12-NEXT: ; in Loop: Header=BB0_2 Depth=1
; GFX12-NEXT: s_or_b32 exec_lo, exec_lo, s3
@@ -101,7 +99,6 @@ define amdgpu_cs void @_amdgpu_cs_main(float %0, i32 %1) {
; GFX12-NEXT: s_or_b32 s2, s2, s0
; GFX12-NEXT: s_branch .LBB0_1
; GFX12-NEXT: .LBB0_4: ; %loop0_merge
-; GFX12-NEXT: s_set_inst_prefetch_distance 0x2
; GFX12-NEXT: s_endpgm
branch1_true:
br label %bb
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