[llvm] [AMDGPU] Disable hasVALUMaskWriteHazard for GFX12 (PR #78187)
via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 15 08:46:36 PST 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-amdgpu
Author: Jay Foad (jayfoad)
<details>
<summary>Changes</summary>
- Add GFX12 testing to valu-mask-write-hazard.mir
- [AMDGPU] Disable hasVALUMaskWriteHazard for GFX12
---
Patch is 35.70 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/78187.diff
2 Files Affected:
- (modified) llvm/lib/Target/AMDGPU/GCNSubtarget.h (+1-1)
- (modified) llvm/test/CodeGen/AMDGPU/valu-mask-write-hazard.mir (+306-168)
``````````diff
diff --git a/llvm/lib/Target/AMDGPU/GCNSubtarget.h b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
index 070d165cdaadb8..ba1302e6bce8ee 100644
--- a/llvm/lib/Target/AMDGPU/GCNSubtarget.h
+++ b/llvm/lib/Target/AMDGPU/GCNSubtarget.h
@@ -1146,7 +1146,7 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
bool hasForceStoreSC0SC1() const { return HasForceStoreSC0SC1; }
- bool hasVALUMaskWriteHazard() const { return getGeneration() >= GFX11; }
+ bool hasVALUMaskWriteHazard() const { return getGeneration() == GFX11; }
/// Return if operations acting on VGPR tuples require even alignment.
bool needsAlignedVGPRs() const { return GFX90AInsts; }
diff --git a/llvm/test/CodeGen/AMDGPU/valu-mask-write-hazard.mir b/llvm/test/CodeGen/AMDGPU/valu-mask-write-hazard.mir
index 350d0985fbfed9..87d81c767ed14e 100644
--- a/llvm/test/CodeGen/AMDGPU/valu-mask-write-hazard.mir
+++ b/llvm/test/CodeGen/AMDGPU/valu-mask-write-hazard.mir
@@ -1,5 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -march=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64 -verify-machineinstrs -run-pass post-RA-hazard-rec -o - %s | FileCheck -check-prefix=GCN %s
+# RUN: llc -march=amdgcn -mcpu=gfx1100 -mattr=+wavefrontsize64 -verify-machineinstrs -run-pass post-RA-hazard-rec -o - %s | FileCheck -check-prefixes=GCN,GFX11 %s
+# RUN: llc -march=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize64 -verify-machineinstrs -run-pass post-RA-hazard-rec -o - %s | FileCheck -check-prefixes=GCN,GFX12 %s
--- |
@mem = internal unnamed_addr addrspace(4) constant [4 x <4 x i32>] [<4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>, <4 x i32> <i32 0, i32 0, i32 0, i32 0>]
@@ -44,12 +45,17 @@
name: mask_hazard_getpc1
body: |
bb.0:
- ; GCN-LABEL: name: mask_hazard_getpc1
- ; GCN: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0_sgpr1, implicit $exec
- ; GCN-NEXT: $sgpr0_sgpr1 = S_GETPC_B64
- ; GCN-NEXT: S_WAITCNT_DEPCTR 65534
- ; GCN-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, 0, implicit-def $scc
- ; GCN-NEXT: S_ENDPGM 0
+ ; GFX11-LABEL: name: mask_hazard_getpc1
+ ; GFX11: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0_sgpr1, implicit $exec
+ ; GFX11-NEXT: $sgpr0_sgpr1 = S_GETPC_B64
+ ; GFX11-NEXT: S_WAITCNT_DEPCTR 65534
+ ; GFX11-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, 0, implicit-def $scc
+ ; GFX11-NEXT: S_ENDPGM 0
+ ; GFX12-LABEL: name: mask_hazard_getpc1
+ ; GFX12: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0_sgpr1, implicit $exec
+ ; GFX12-NEXT: $sgpr0_sgpr1 = S_GETPC_B64
+ ; GFX12-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, 0, implicit-def $scc
+ ; GFX12-NEXT: S_ENDPGM 0
$vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0_sgpr1, implicit $exec
$sgpr0_sgpr1 = S_GETPC_B64
$sgpr0 = S_ADD_U32 $sgpr0, 0, implicit-def $scc
@@ -60,15 +66,23 @@ body: |
name: mask_hazard_getpc2
body: |
bb.0:
- ; GCN-LABEL: name: mask_hazard_getpc2
- ; GCN: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0_sgpr1, implicit $exec
- ; GCN-NEXT: BUNDLE implicit-def $sgpr0_sgpr1 {
- ; GCN-NEXT: $sgpr0_sgpr1 = S_GETPC_B64
- ; GCN-NEXT: S_WAITCNT_DEPCTR 65534
- ; GCN-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, target-flags(amdgpu-rel32-lo) @mem + 8, implicit-def $scc
- ; GCN-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, target-flags(amdgpu-rel32-lo) @mem + 16, implicit-def $scc, implicit $scc
- ; GCN-NEXT: }
- ; GCN-NEXT: S_ENDPGM 0
+ ; GFX11-LABEL: name: mask_hazard_getpc2
+ ; GFX11: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0_sgpr1, implicit $exec
+ ; GFX11-NEXT: BUNDLE implicit-def $sgpr0_sgpr1 {
+ ; GFX11-NEXT: $sgpr0_sgpr1 = S_GETPC_B64
+ ; GFX11-NEXT: S_WAITCNT_DEPCTR 65534
+ ; GFX11-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, target-flags(amdgpu-rel32-lo) @mem + 8, implicit-def $scc
+ ; GFX11-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, target-flags(amdgpu-rel32-lo) @mem + 16, implicit-def $scc, implicit $scc
+ ; GFX11-NEXT: }
+ ; GFX11-NEXT: S_ENDPGM 0
+ ; GFX12-LABEL: name: mask_hazard_getpc2
+ ; GFX12: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0_sgpr1, implicit $exec
+ ; GFX12-NEXT: BUNDLE implicit-def $sgpr0_sgpr1 {
+ ; GFX12-NEXT: $sgpr0_sgpr1 = S_GETPC_B64
+ ; GFX12-NEXT: $sgpr0 = S_ADD_U32 $sgpr0, target-flags(amdgpu-rel32-lo) @mem + 4, implicit-def $scc
+ ; GFX12-NEXT: $sgpr1 = S_ADDC_U32 $sgpr1, target-flags(amdgpu-rel32-lo) @mem + 12, implicit-def $scc, implicit $scc
+ ; GFX12-NEXT: }
+ ; GFX12-NEXT: S_ENDPGM 0
$vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr0_sgpr1, implicit $exec
BUNDLE implicit-def $sgpr0_sgpr1 {
$sgpr0_sgpr1 = S_GETPC_B64
@@ -82,11 +96,15 @@ body: |
name: mask_hazard_vcc1
body: |
bb.0:
- ; GCN-LABEL: name: mask_hazard_vcc1
- ; GCN: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr2_sgpr3, implicit $exec
- ; GCN-NEXT: $sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
- ; GCN-NEXT: S_WAITCNT_DEPCTR 65534
- ; GCN-NEXT: S_ENDPGM 0
+ ; GFX11-LABEL: name: mask_hazard_vcc1
+ ; GFX11: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr2_sgpr3, implicit $exec
+ ; GFX11-NEXT: $sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
+ ; GFX11-NEXT: S_WAITCNT_DEPCTR 65534
+ ; GFX11-NEXT: S_ENDPGM 0
+ ; GFX12-LABEL: name: mask_hazard_vcc1
+ ; GFX12: $vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr2_sgpr3, implicit $exec
+ ; GFX12-NEXT: $sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
+ ; GFX12-NEXT: S_ENDPGM 0
$vgpr1 = V_CNDMASK_B32_e64 0, $vgpr1, 0, $vgpr2, $sgpr2_sgpr3, implicit $exec
$sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
S_ENDPGM 0
@@ -96,11 +114,15 @@ body: |
name: mask_hazard_vcc2
body: |
bb.0:
- ; GCN-LABEL: name: mask_hazard_vcc2
- ; GCN: $vgpr1 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $vcc, implicit $exec
- ; GCN-NEXT: $vcc = S_CSELECT_B64 -1, 0, implicit $scc
- ; GCN-NEXT: S_WAITCNT_DEPCTR 65534
- ; GCN-NEXT: S_ENDPGM 0
+ ; GFX11-LABEL: name: mask_hazard_vcc2
+ ; GFX11: $vgpr1 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $vcc, implicit $exec
+ ; GFX11-NEXT: $vcc = S_CSELECT_B64 -1, 0, implicit $scc
+ ; GFX11-NEXT: S_WAITCNT_DEPCTR 65534
+ ; GFX11-NEXT: S_ENDPGM 0
+ ; GFX12-LABEL: name: mask_hazard_vcc2
+ ; GFX12: $vgpr1 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $vcc, implicit $exec
+ ; GFX12-NEXT: $vcc = S_CSELECT_B64 -1, 0, implicit $scc
+ ; GFX12-NEXT: S_ENDPGM 0
$vgpr1 = V_CNDMASK_B32_e32 $vgpr1, $vgpr2, implicit $vcc, implicit $exec
$vcc = S_CSELECT_B64 -1, 0, implicit $scc
S_ENDPGM 0
@@ -110,11 +132,15 @@ body: |
name: mask_hazard_cndmask_dpp1
body: |
bb.0:
- ; GCN-LABEL: name: mask_hazard_cndmask_dpp1
- ; GCN: $vgpr0 = V_CNDMASK_B32_dpp $vgpr0, 0, $vgpr1, 0, $vgpr2, 1, 15, 15, 1, implicit $vcc, implicit $exec
- ; GCN-NEXT: $vcc = S_CSELECT_B64 -1, 0, implicit $scc
- ; GCN-NEXT: S_WAITCNT_DEPCTR 65534
- ; GCN-NEXT: S_ENDPGM 0
+ ; GFX11-LABEL: name: mask_hazard_cndmask_dpp1
+ ; GFX11: $vgpr0 = V_CNDMASK_B32_dpp $vgpr0, 0, $vgpr1, 0, $vgpr2, 1, 15, 15, 1, implicit $vcc, implicit $exec
+ ; GFX11-NEXT: $vcc = S_CSELECT_B64 -1, 0, implicit $scc
+ ; GFX11-NEXT: S_WAITCNT_DEPCTR 65534
+ ; GFX11-NEXT: S_ENDPGM 0
+ ; GFX12-LABEL: name: mask_hazard_cndmask_dpp1
+ ; GFX12: $vgpr0 = V_CNDMASK_B32_dpp $vgpr0, 0, $vgpr1, 0, $vgpr2, 1, 15, 15, 1, implicit $vcc, implicit $exec
+ ; GFX12-NEXT: $vcc = S_CSELECT_B64 -1, 0, implicit $scc
+ ; GFX12-NEXT: S_ENDPGM 0
$vgpr0 = V_CNDMASK_B32_dpp $vgpr0, 0, $vgpr1, 0, $vgpr2, 1, 15, 15, 1, implicit $vcc, implicit $exec
$vcc = S_CSELECT_B64 -1, 0, implicit $scc
S_ENDPGM 0
@@ -124,11 +150,15 @@ body: |
name: mask_hazard_cndmask_dpp2
body: |
bb.0:
- ; GCN-LABEL: name: mask_hazard_cndmask_dpp2
- ; GCN: $vgpr0 = V_CNDMASK_B32_e64_dpp $vgpr0, 0, $vgpr1, 0, $vgpr2, $sgpr2_sgpr3, 1, 15, 15, 1, implicit $exec
- ; GCN-NEXT: $sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
- ; GCN-NEXT: S_WAITCNT_DEPCTR 65534
- ; GCN-NEXT: S_ENDPGM 0
+ ; GFX11-LABEL: name: mask_hazard_cndmask_dpp2
+ ; GFX11: $vgpr0 = V_CNDMASK_B32_e64_dpp $vgpr0, 0, $vgpr1, 0, $vgpr2, $sgpr2_sgpr3, 1, 15, 15, 1, implicit $exec
+ ; GFX11-NEXT: $sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
+ ; GFX11-NEXT: S_WAITCNT_DEPCTR 65534
+ ; GFX11-NEXT: S_ENDPGM 0
+ ; GFX12-LABEL: name: mask_hazard_cndmask_dpp2
+ ; GFX12: $vgpr0 = V_CNDMASK_B32_e64_dpp $vgpr0, 0, $vgpr1, 0, $vgpr2, $sgpr2_sgpr3, 1, 15, 15, 1, implicit $exec
+ ; GFX12-NEXT: $sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
+ ; GFX12-NEXT: S_ENDPGM 0
$vgpr0 = V_CNDMASK_B32_e64_dpp $vgpr0, 0, $vgpr1, 0, $vgpr2, $sgpr2_sgpr3, 1, 15, 15, 1, implicit $exec
$sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
S_ENDPGM 0
@@ -138,11 +168,15 @@ body: |
name: mask_hazard_cndmask_dpp4
body: |
bb.0:
- ; GCN-LABEL: name: mask_hazard_cndmask_dpp4
- ; GCN: $vgpr0 = V_CNDMASK_B16_e64_dpp $vgpr0, 0, $vgpr1, 0, $vgpr2, $sgpr2_sgpr3, 1, 15, 15, 1, implicit $exec
- ; GCN-NEXT: $sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
- ; GCN-NEXT: S_WAITCNT_DEPCTR 65534
- ; GCN-NEXT: S_ENDPGM 0
+ ; GFX11-LABEL: name: mask_hazard_cndmask_dpp4
+ ; GFX11: $vgpr0 = V_CNDMASK_B16_e64_dpp $vgpr0, 0, $vgpr1, 0, $vgpr2, $sgpr2_sgpr3, 1, 15, 15, 1, implicit $exec
+ ; GFX11-NEXT: $sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
+ ; GFX11-NEXT: S_WAITCNT_DEPCTR 65534
+ ; GFX11-NEXT: S_ENDPGM 0
+ ; GFX12-LABEL: name: mask_hazard_cndmask_dpp4
+ ; GFX12: $vgpr0 = V_CNDMASK_B16_e64_dpp $vgpr0, 0, $vgpr1, 0, $vgpr2, $sgpr2_sgpr3, 1, 15, 15, 1, implicit $exec
+ ; GFX12-NEXT: $sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
+ ; GFX12-NEXT: S_ENDPGM 0
$vgpr0 = V_CNDMASK_B16_e64_dpp $vgpr0, 0, $vgpr1, 0, $vgpr2, $sgpr2_sgpr3, 1, 15, 15, 1, implicit $exec
$sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
S_ENDPGM 0
@@ -152,11 +186,15 @@ body: |
name: mask_hazard_addc1
body: |
bb.0:
- ; GCN-LABEL: name: mask_hazard_addc1
- ; GCN: $vgpr1, $vcc = V_ADDC_U32_e64 0, $vgpr1, $sgpr2_sgpr3, 0, implicit $exec
- ; GCN-NEXT: $sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
- ; GCN-NEXT: S_WAITCNT_DEPCTR 65534
- ; GCN-NEXT: S_ENDPGM 0
+ ; GFX11-LABEL: name: mask_hazard_addc1
+ ; GFX11: $vgpr1, $vcc = V_ADDC_U32_e64 0, $vgpr1, $sgpr2_sgpr3, 0, implicit $exec
+ ; GFX11-NEXT: $sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
+ ; GFX11-NEXT: S_WAITCNT_DEPCTR 65534
+ ; GFX11-NEXT: S_ENDPGM 0
+ ; GFX12-LABEL: name: mask_hazard_addc1
+ ; GFX12: $vgpr1, $vcc = V_ADDC_U32_e64 0, $vgpr1, $sgpr2_sgpr3, 0, implicit $exec
+ ; GFX12-NEXT: $sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
+ ; GFX12-NEXT: S_ENDPGM 0
$vgpr1, $vcc = V_ADDC_U32_e64 0, $vgpr1, $sgpr2_sgpr3, 0, implicit $exec
$sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
S_ENDPGM 0
@@ -166,11 +204,15 @@ body: |
name: mask_hazard_addc2
body: |
bb.0:
- ; GCN-LABEL: name: mask_hazard_addc2
- ; GCN: $vgpr1 = V_ADDC_U32_e32 0, $vgpr1, implicit-def $vcc, implicit $vcc, implicit $exec
- ; GCN-NEXT: $vcc = S_CSELECT_B64 -1, 0, implicit $scc
- ; GCN-NEXT: S_WAITCNT_DEPCTR 65534
- ; GCN-NEXT: S_ENDPGM 0
+ ; GFX11-LABEL: name: mask_hazard_addc2
+ ; GFX11: $vgpr1 = V_ADDC_U32_e32 0, $vgpr1, implicit-def $vcc, implicit $vcc, implicit $exec
+ ; GFX11-NEXT: $vcc = S_CSELECT_B64 -1, 0, implicit $scc
+ ; GFX11-NEXT: S_WAITCNT_DEPCTR 65534
+ ; GFX11-NEXT: S_ENDPGM 0
+ ; GFX12-LABEL: name: mask_hazard_addc2
+ ; GFX12: $vgpr1 = V_ADDC_U32_e32 0, $vgpr1, implicit-def $vcc, implicit $vcc, implicit $exec
+ ; GFX12-NEXT: $vcc = S_CSELECT_B64 -1, 0, implicit $scc
+ ; GFX12-NEXT: S_ENDPGM 0
$vgpr1 = V_ADDC_U32_e32 0, $vgpr1, implicit-def $vcc, implicit $vcc, implicit $exec
$vcc = S_CSELECT_B64 -1, 0, implicit $scc
S_ENDPGM 0
@@ -180,11 +222,15 @@ body: |
name: mask_hazard_addc3
body: |
bb.0:
- ; GCN-LABEL: name: mask_hazard_addc3
- ; GCN: $vgpr0 = V_ADDC_U32_dpp $vgpr0, $vgpr1, $vgpr2, 1, 15, 15, 1, implicit-def $vcc, implicit $vcc, implicit $exec
- ; GCN-NEXT: $vcc = S_CSELECT_B64 -1, 0, implicit $scc
- ; GCN-NEXT: S_WAITCNT_DEPCTR 65534
- ; GCN-NEXT: S_ENDPGM 0
+ ; GFX11-LABEL: name: mask_hazard_addc3
+ ; GFX11: $vgpr0 = V_ADDC_U32_dpp $vgpr0, $vgpr1, $vgpr2, 1, 15, 15, 1, implicit-def $vcc, implicit $vcc, implicit $exec
+ ; GFX11-NEXT: $vcc = S_CSELECT_B64 -1, 0, implicit $scc
+ ; GFX11-NEXT: S_WAITCNT_DEPCTR 65534
+ ; GFX11-NEXT: S_ENDPGM 0
+ ; GFX12-LABEL: name: mask_hazard_addc3
+ ; GFX12: $vgpr0 = V_ADDC_U32_dpp $vgpr0, $vgpr1, $vgpr2, 1, 15, 15, 1, implicit-def $vcc, implicit $vcc, implicit $exec
+ ; GFX12-NEXT: $vcc = S_CSELECT_B64 -1, 0, implicit $scc
+ ; GFX12-NEXT: S_ENDPGM 0
$vgpr0 = V_ADDC_U32_dpp $vgpr0, $vgpr1, $vgpr2, 1, 15, 15, 1, implicit-def $vcc, implicit $vcc, implicit $exec
$vcc = S_CSELECT_B64 -1, 0, implicit $scc
S_ENDPGM 0
@@ -194,11 +240,15 @@ body: |
name: mask_hazard_addc4
body: |
bb.0:
- ; GCN-LABEL: name: mask_hazard_addc4
- ; GCN: $vgpr0, $sgpr2_sgpr3 = V_ADDC_U32_e64_dpp $vgpr0, $vgpr1, $vgpr2, $sgpr2_sgpr3, 0, 1, 15, 15, 1, implicit $exec
- ; GCN-NEXT: $sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
- ; GCN-NEXT: S_WAITCNT_DEPCTR 65534
- ; GCN-NEXT: S_ENDPGM 0
+ ; GFX11-LABEL: name: mask_hazard_addc4
+ ; GFX11: $vgpr0, $sgpr2_sgpr3 = V_ADDC_U32_e64_dpp $vgpr0, $vgpr1, $vgpr2, $sgpr2_sgpr3, 0, 1, 15, 15, 1, implicit $exec
+ ; GFX11-NEXT: $sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
+ ; GFX11-NEXT: S_WAITCNT_DEPCTR 65534
+ ; GFX11-NEXT: S_ENDPGM 0
+ ; GFX12-LABEL: name: mask_hazard_addc4
+ ; GFX12: $vgpr0, $sgpr2_sgpr3 = V_ADDC_U32_e64_dpp $vgpr0, $vgpr1, $vgpr2, $sgpr2_sgpr3, 0, 1, 15, 15, 1, implicit $exec
+ ; GFX12-NEXT: $sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
+ ; GFX12-NEXT: S_ENDPGM 0
$vgpr0, $sgpr2_sgpr3 = V_ADDC_U32_e64_dpp $vgpr0, $vgpr1, $vgpr2, $sgpr2_sgpr3, 0, 1, 15, 15, 1, implicit $exec
$sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
S_ENDPGM 0
@@ -208,11 +258,15 @@ body: |
name: mask_hazard_subb1
body: |
bb.0:
- ; GCN-LABEL: name: mask_hazard_subb1
- ; GCN: $vgpr1, $vcc = V_SUBB_U32_e64 0, $vgpr1, $sgpr2_sgpr3, 0, implicit $exec
- ; GCN-NEXT: $sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
- ; GCN-NEXT: S_WAITCNT_DEPCTR 65534
- ; GCN-NEXT: S_ENDPGM 0
+ ; GFX11-LABEL: name: mask_hazard_subb1
+ ; GFX11: $vgpr1, $vcc = V_SUBB_U32_e64 0, $vgpr1, $sgpr2_sgpr3, 0, implicit $exec
+ ; GFX11-NEXT: $sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
+ ; GFX11-NEXT: S_WAITCNT_DEPCTR 65534
+ ; GFX11-NEXT: S_ENDPGM 0
+ ; GFX12-LABEL: name: mask_hazard_subb1
+ ; GFX12: $vgpr1, $vcc = V_SUBB_U32_e64 0, $vgpr1, $sgpr2_sgpr3, 0, implicit $exec
+ ; GFX12-NEXT: $sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
+ ; GFX12-NEXT: S_ENDPGM 0
$vgpr1, $vcc = V_SUBB_U32_e64 0, $vgpr1, $sgpr2_sgpr3, 0, implicit $exec
$sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
S_ENDPGM 0
@@ -222,11 +276,15 @@ body: |
name: mask_hazard_subb2
body: |
bb.0:
- ; GCN-LABEL: name: mask_hazard_subb2
- ; GCN: $vgpr1 = V_SUBB_U32_e32 0, $vgpr1, implicit-def $vcc, implicit $vcc, implicit $exec
- ; GCN-NEXT: $vcc = S_CSELECT_B64 -1, 0, implicit $scc
- ; GCN-NEXT: S_WAITCNT_DEPCTR 65534
- ; GCN-NEXT: S_ENDPGM 0
+ ; GFX11-LABEL: name: mask_hazard_subb2
+ ; GFX11: $vgpr1 = V_SUBB_U32_e32 0, $vgpr1, implicit-def $vcc, implicit $vcc, implicit $exec
+ ; GFX11-NEXT: $vcc = S_CSELECT_B64 -1, 0, implicit $scc
+ ; GFX11-NEXT: S_WAITCNT_DEPCTR 65534
+ ; GFX11-NEXT: S_ENDPGM 0
+ ; GFX12-LABEL: name: mask_hazard_subb2
+ ; GFX12: $vgpr1 = V_SUBB_U32_e32 0, $vgpr1, implicit-def $vcc, implicit $vcc, implicit $exec
+ ; GFX12-NEXT: $vcc = S_CSELECT_B64 -1, 0, implicit $scc
+ ; GFX12-NEXT: S_ENDPGM 0
$vgpr1 = V_SUBB_U32_e32 0, $vgpr1, implicit-def $vcc, implicit $vcc, implicit $exec
$vcc = S_CSELECT_B64 -1, 0, implicit $scc
S_ENDPGM 0
@@ -236,11 +294,15 @@ body: |
name: mask_hazard_subb3
body: |
bb.0:
- ; GCN-LABEL: name: mask_hazard_subb3
- ; GCN: $vgpr0 = V_SUBB_U32_dpp $vgpr0, $vgpr1, $vgpr2, 1, 15, 15, 1, implicit-def $vcc, implicit $vcc, implicit $exec
- ; GCN-NEXT: $vcc = S_CSELECT_B64 -1, 0, implicit $scc
- ; GCN-NEXT: S_WAITCNT_DEPCTR 65534
- ; GCN-NEXT: S_ENDPGM 0
+ ; GFX11-LABEL: name: mask_hazard_subb3
+ ; GFX11: $vgpr0 = V_SUBB_U32_dpp $vgpr0, $vgpr1, $vgpr2, 1, 15, 15, 1, implicit-def $vcc, implicit $vcc, implicit $exec
+ ; GFX11-NEXT: $vcc = S_CSELECT_B64 -1, 0, implicit $scc
+ ; GFX11-NEXT: S_WAITCNT_DEPCTR 65534
+ ; GFX11-NEXT: S_ENDPGM 0
+ ; GFX12-LABEL: name: mask_hazard_subb3
+ ; GFX12: $vgpr0 = V_SUBB_U32_dpp $vgpr0, $vgpr1, $vgpr2, 1, 15, 15, 1, implicit-def $vcc, implicit $vcc, implicit $exec
+ ; GFX12-NEXT: $vcc = S_CSELECT_B64 -1, 0, implicit $scc
+ ; GFX12-NEXT: S_ENDPGM 0
$vgpr0 = V_SUBB_U32_dpp $vgpr0, $vgpr1, $vgpr2, 1, 15, 15, 1, implicit-def $vcc, implicit $vcc, implicit $exec
$vcc = S_CSELECT_B64 -1, 0, implicit $scc
S_ENDPGM 0
@@ -250,11 +312,15 @@ body: |
name: mask_hazard_subb4
body: |
bb.0:
- ; GCN-LABEL: name: mask_hazard_subb4
- ; GCN: $vgpr0, $sgpr2_sgpr3 = V_SUBB_U32_e64_dpp $vgpr0, $vgpr1, $vgpr2, $sgpr2_sgpr3, 0, 1, 15, 15, 1, implicit $exec
- ; GCN-NEXT: $sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
- ; GCN-NEXT: S_WAITCNT_DEPCTR 65534
- ; GCN-NEXT: S_ENDPGM 0
+ ; GFX11-LABEL: name: mask_hazard_subb4
+ ; GFX11: $vgpr0, $sgpr2_sgpr3 = V_SUBB_U32_e64_dpp $vgpr0, $vgpr1, $vgpr2, $sgpr2_sgpr3, 0, 1, 15, 15, 1, implicit $exec
+ ; GFX11-NEXT: $sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
+ ; GFX11-NEXT: S_WAITCNT_DEPCTR 65534
+ ; GFX11-NEXT: S_ENDPGM 0
+ ; GFX12-LABEL: name: mask_hazard_subb4
+ ; GFX12: $vgpr0, $sgpr2_sgpr3 = V_SUBB_U32_e64_dpp $vgpr0, $vgpr1, $vgpr2, $sgpr2_sgpr3, 0, 1, 15, 15, 1, implicit $exec
+ ; GFX12-NEXT: $sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
+ ; GFX12-NEXT: S_ENDPGM 0
$vgpr0, $sgpr2_sgpr3 = V_SUBB_U32_e64_dpp $vgpr0, $vgpr1, $vgpr2, $sgpr2_sgpr3, 0, 1, 15, 15, 1, implicit $exec
$sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
S_ENDPGM 0
@@ -264,11 +330,15 @@ body: |
name: mask_hazard_subbrev1
body: |
bb.0:
- ; GCN-LABEL: name: mask_hazard_subbrev1
- ; GCN: $vgpr1, $vcc = V_SUBBREV_U32_e64 0, $vgpr1, $sgpr2_sgpr3, 0, implicit $exec
- ; GCN-NEXT: $sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
- ; GCN-NEXT: S_WAITCNT_DEPCTR 65534
- ; GCN-NEXT: S_ENDPGM 0
+ ; GFX11-LABEL: name: mask_hazard_subbrev1
+ ; GFX11: $vgpr1, $vcc = V_SUBBREV_U32_e64 0, $vgpr1, $sgpr2_sgpr3, 0, implicit $exec
+ ; GFX11-NEXT: $sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
+ ; GFX11-NEXT: S_WAITCNT_DEPCTR 65534
+ ; GFX11-NEXT: S_ENDPGM 0
+ ; GFX12-LABEL: name: mask_hazard_subbrev1
+ ; GFX12: $vgpr1, $vcc = V_SUBBREV_U32_e64 0, $vgpr1, $sgpr2_sgpr3, 0, implicit $exec
+ ; GFX12-NEXT: $sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
+ ; GFX12-NEXT: S_ENDPGM 0
$vgpr1, $vcc = V_SUBBREV_U32_e64 0, $vgpr1, $sgpr2_sgpr3, 0, implicit $exec
$sgpr2_sgpr3 = S_CSELECT_B64 -1, 0, implicit $scc
S_ENDPGM 0
@@ -278,11 +348,15 @@ body: |
name: mask_hazard_subbrev2
body: |
bb.0:
- ; GCN-LABEL: name: mask_hazard_subbrev2
- ; GCN: $vgpr1 = V_SUBBREV_U32_e32 0, $vgpr1, implicit-def $vcc, implicit $vcc, implicit $exec
- ; GCN-NEXT: $vcc = S_CSELECT_B64 -1, 0, implicit $scc
- ; GCN-NEXT: S_WAITCNT_DEPCTR 65534
- ; GCN-NEXT: S_ENDPGM 0
+ ; GFX11-LABEL: name: mask_...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/78187
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