[llvm] [AMDGPU] Src1 of VOP3 DPP instructions can be SGPR on GFX12 (PR #77929)

Joe Nash via llvm-commits llvm-commits at lists.llvm.org
Mon Jan 15 08:36:03 PST 2024

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Sisyph wrote:

Can you please add asm and disasm tests for vopc->vop3 dpp with sgpr src1, and for an instruction with sgprs in src1 and src2?

https://github.com/llvm/llvm-project/pull/77929

Previous message: [llvm] 62b7e35 - [SystemZ] Don't assert for i128 vectors in getInterleavedMemoryOpCost() (#78009)
Next message: [llvm] [AMDGPU] Src1 of VOP3 DPP instructions can be SGPR on GFX12 (PR #77929)
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