[llvm] [AMDGPU] Allow buffer intrinsics to be marked volatile at the IR level (PR #77847)

[Nicolai Hähnle via llvm-commits]

https://github.com/nhaehnle commented:

I'm okay with using the flag bit in this way.

This is probably cleaner than what LLPC does today de facto, which is to just translate "volatile" into the corresponding glc/dlc/etc. bit settings.

https://github.com/llvm/llvm-project/pull/77847