[llvm] 2e78c22 - [RISCV] Simplify the description for ssaia and smaia. (#77870)

[via llvm-commits]

Author: Craig Topper
Date: 2024-01-11T23:53:00-08:00
New Revision: 2e78c220fc18bc79cf396b96c65de6d4446318c6

URL: https://github.com/llvm/llvm-project/commit/2e78c220fc18bc79cf396b96c65de6d4446318c6
DIFF: https://github.com/llvm/llvm-project/commit/2e78c220fc18bc79cf396b96c65de6d4446318c6.diff

LOG: [RISCV] Simplify the description for ssaia and smaia. (#77870)

It feels more important to expand out Advanced Interrupt Architecture
for users than to have a description that explains how one extension is
different from the other.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/RISCVFeatures.td

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/RISCVFeatures.td b/llvm/lib/Target/RISCV/RISCVFeatures.td
index 4c99d8ce61ef02..72b9c2cade62c7 100644
--- a/llvm/lib/Target/RISCV/RISCVFeatures.td
+++ b/llvm/lib/Target/RISCV/RISCVFeatures.td
@@ -711,16 +711,13 @@ def NoHasStdExtZicfiss : Predicate<"!Subtarget->hasStdExtZicfiss()">;
 
 def FeatureStdExtSmaia
     : SubtargetFeature<"smaia", "HasStdExtSmaia", "true",
-                       "'Smaia' (Smaia encompasses all added CSRs and all "
-                       "modifications to interrupt response behavior that the "
-                       "AIA specifies for a hart, over all privilege levels.)",
-                       []>;
+                       "'Smaia' (Advanced Interrupt Architecture Machine "
+                       "Level)", []>;
 
 def FeatureStdExtSsaia
     : SubtargetFeature<"ssaia", "HasStdExtSsaia", "true",
-                       "'Ssaia' (Ssaia is essentially the same as Smaia except "
-                       "excluding the machine-level CSRs and behavior not "
-                       "directly visible to supervisor level.)", []>;
+                       "'Ssaia' (Advanced Interrupt Architecture Supervisor "
+                       "Level)", []>;
 
 def HasHalfFPLoadStoreMove
     : Predicate<"Subtarget->hasHalfFPLoadStoreMove()">,