[llvm] 4f71068 - [X86] Correct the asm comment for compression NF_ND -> NF

[Shengchen Kan via llvm-commits]

Author: Shengchen Kan
Date: 2024-01-12T12:55:11+08:00
New Revision: 4f71068b727231589d415dbad2edc90e08f7ced4

URL: https://github.com/llvm/llvm-project/commit/4f71068b727231589d415dbad2edc90e08f7ced4
DIFF: https://github.com/llvm/llvm-project/commit/4f71068b727231589d415dbad2edc90e08f7ced4.diff

LOG: [X86] Correct the asm comment for compression NF_ND -> NF

Added: 
    

Modified: 
    llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
    llvm/lib/Target/X86/X86CompressEVEX.cpp
    llvm/lib/Target/X86/X86InstrInfo.h
    llvm/lib/Target/X86/X86MCInstLower.cpp
    llvm/test/CodeGen/X86/apx/compress-evex.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
index e006dd8773609f..a37e7af2089049 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
@@ -818,6 +818,8 @@ enum : uint64_t {
   /// Encoding
   EncodingShift = SSEDomainShift + 2,
   EncodingMask = 0x3 << EncodingShift,
+  /// LEGACY - encoding using REX/REX2 or w/o opcode prefix.
+  LEGACY = 0 << EncodingShift,
   /// VEX - encoding using 0xC4/0xC5
   VEX = 1 << EncodingShift,
   /// XOP - Opcode prefix used by XOP instructions.

diff  --git a/llvm/lib/Target/X86/X86CompressEVEX.cpp b/llvm/lib/Target/X86/X86CompressEVEX.cpp
index 5e6b6d6d16e964..a2bab9793b9cee 100644
--- a/llvm/lib/Target/X86/X86CompressEVEX.cpp
+++ b/llvm/lib/Target/X86/X86CompressEVEX.cpp
@@ -286,9 +286,22 @@ static bool CompressEVEXImpl(MachineInstr &MI, const X86Subtarget &ST) {
 
   const MCInstrDesc &NewDesc = ST.getInstrInfo()->get(I->NewOpc);
   MI.setDesc(NewDesc);
-  uint64_t Encoding = NewDesc.TSFlags & X86II::EncodingMask;
-  auto AsmComment =
-      (Encoding == X86II::VEX) ? X86::AC_EVEX_2_VEX : X86::AC_EVEX_2_LEGACY;
+  unsigned AsmComment;
+  switch (NewDesc.TSFlags & X86II::EncodingMask) {
+  case X86II::LEGACY:
+    AsmComment = X86::AC_EVEX_2_LEGACY;
+    break;
+  case X86II::VEX:
+    AsmComment = X86::AC_EVEX_2_VEX;
+    break;
+  case X86II::EVEX:
+    AsmComment = X86::AC_EVEX_2_EVEX;
+    assert(IsND && (NewDesc.TSFlags & X86II::EVEX_NF) &&
+           "Unknown EVEX2EVEX compression");
+    break;
+  default:
+    llvm_unreachable("Unknown EVEX compression");
+  }
   MI.setAsmPrinterFlag(AsmComment);
   if (IsND)
     MI.tieOperands(0, 1);

diff  --git a/llvm/lib/Target/X86/X86InstrInfo.h b/llvm/lib/Target/X86/X86InstrInfo.h
index eb0734f9a61824..24457ee393b0f4 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.h
+++ b/llvm/lib/Target/X86/X86InstrInfo.h
@@ -32,7 +32,9 @@ enum AsmComments {
   // For instr that was compressed from EVEX to LEGACY.
   AC_EVEX_2_LEGACY = MachineInstr::TAsmComments,
   // For instr that was compressed from EVEX to VEX.
-  AC_EVEX_2_VEX = AC_EVEX_2_LEGACY << 1
+  AC_EVEX_2_VEX = AC_EVEX_2_LEGACY << 1,
+  // For instr that was compressed from EVEX to EVEX.
+  AC_EVEX_2_EVEX = AC_EVEX_2_VEX << 1
 };
 
 /// Return a pair of condition code for the given predicate and whether

diff  --git a/llvm/lib/Target/X86/X86MCInstLower.cpp b/llvm/lib/Target/X86/X86MCInstLower.cpp
index 133ee2041565eb..5aad99c74eb614 100644
--- a/llvm/lib/Target/X86/X86MCInstLower.cpp
+++ b/llvm/lib/Target/X86/X86MCInstLower.cpp
@@ -2061,6 +2061,8 @@ void X86AsmPrinter::emitInstruction(const MachineInstr *MI) {
       OutStreamer->AddComment("EVEX TO LEGACY Compression ", false);
     else if (MI->getAsmPrinterFlags() & X86::AC_EVEX_2_VEX)
       OutStreamer->AddComment("EVEX TO VEX Compression ", false);
+    else if (MI->getAsmPrinterFlags() & X86::AC_EVEX_2_EVEX)
+      OutStreamer->AddComment("EVEX TO EVEX Compression ", false);
   }
 
   // Add comments for values loaded from constant pool.

diff  --git a/llvm/test/CodeGen/X86/apx/compress-evex.mir b/llvm/test/CodeGen/X86/apx/compress-evex.mir
index 5089ef78f6804f..7e13896e985907 100644
--- a/llvm/test/CodeGen/X86/apx/compress-evex.mir
+++ b/llvm/test/CodeGen/X86/apx/compress-evex.mir
@@ -51,3 +51,13 @@ body:             |
     renamable $rax = XOR64rr_ND killed renamable $rax, killed renamable $r16, implicit-def dead $eflags
     RET64 $rax
 ...
+---
+name:            ndd_2_non_ndd_egpr_nf
+body:             |
+  bb.0.entry:
+    liveins: $rdi, $r16
+    ; CHECK: {nf} xorq %r16, %rax                   # EVEX TO EVEX Compression encoding: [0x62,0xe4,0xfc,0x0c,0x31,0xc0]
+    renamable $rax = ADD64rr_ND killed renamable $rdi, renamable $r16, implicit-def dead $eflags
+    renamable $rax = XOR64rr_NF_ND killed renamable $rax, killed renamable $r16
+    RET64 $rax
+...