[llvm] 9e40ba0 - [RISCV] Remove period from Zvbb extension description.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 11 19:33:12 PST 2024
Author: Craig Topper
Date: 2024-01-11T19:28:05-08:00
New Revision: 9e40ba0c2d2cd03f0b99da191b1e6bef8f3d8953
URL: https://github.com/llvm/llvm-project/commit/9e40ba0c2d2cd03f0b99da191b1e6bef8f3d8953
DIFF: https://github.com/llvm/llvm-project/commit/9e40ba0c2d2cd03f0b99da191b1e6bef8f3d8953.diff
LOG: [RISCV] Remove period from Zvbb extension description.
No other instruction extension has a period.
There are also periods in 'ssaia' and 'smaia', but those descriptions
need a different update.
Added:
Modified:
llvm/lib/Target/RISCV/RISCVFeatures.td
llvm/test/MC/RISCV/rvv/zvbb.s
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVFeatures.td b/llvm/lib/Target/RISCV/RISCVFeatures.td
index 279509575bb52a..4c99d8ce61ef02 100644
--- a/llvm/lib/Target/RISCV/RISCVFeatures.td
+++ b/llvm/lib/Target/RISCV/RISCVFeatures.td
@@ -569,11 +569,11 @@ def HasStdExtZvkb : Predicate<"Subtarget->hasStdExtZvkb()">,
def FeatureStdExtZvbb
: SubtargetFeature<"zvbb", "HasStdExtZvbb", "true",
- "'Zvbb' (Vector basic bit-manipulation instructions.)",
+ "'Zvbb' (Vector basic bit-manipulation instructions)",
[FeatureStdExtZvkb]>;
def HasStdExtZvbb : Predicate<"Subtarget->hasStdExtZvbb()">,
AssemblerPredicate<(all_of FeatureStdExtZvbb),
- "'Zvbb' (Vector basic bit-manipulation instructions.)">;
+ "'Zvbb' (Vector basic bit-manipulation instructions)">;
def FeatureStdExtZvbc
: SubtargetFeature<"zvbc", "HasStdExtZvbc", "true",
diff --git a/llvm/test/MC/RISCV/rvv/zvbb.s b/llvm/test/MC/RISCV/rvv/zvbb.s
index 41d865e035eaea..04e5ad6e03f718 100644
--- a/llvm/test/MC/RISCV/rvv/zvbb.s
+++ b/llvm/test/MC/RISCV/rvv/zvbb.s
@@ -11,41 +11,41 @@
vbrev.v v10, v9, v0.t
# CHECK-INST: vbrev.v v10, v9, v0.t
# CHECK-ENCODING: [0x57,0x25,0x95,0x48]
-# CHECK-ERROR: instruction requires the following: 'Zvbb' (Vector basic bit-manipulation instructions.){{$}}
+# CHECK-ERROR: instruction requires the following: 'Zvbb' (Vector basic bit-manipulation instructions){{$}}
# CHECK-UNKNOWN: 57 25 95 48 <unknown>
vclz.v v10, v9, v0.t
# CHECK-INST: vclz.v v10, v9, v0.t
# CHECK-ENCODING: [0x57,0x25,0x96,0x48]
-# CHECK-ERROR: instruction requires the following: 'Zvbb' (Vector basic bit-manipulation instructions.){{$}}
+# CHECK-ERROR: instruction requires the following: 'Zvbb' (Vector basic bit-manipulation instructions){{$}}
# CHECK-UNKNOWN: 57 25 96 48 <unknown>
vcpop.v v10, v9, v0.t
# CHECK-INST: vcpop.v v10, v9, v0.t
# CHECK-ENCODING: [0x57,0x25,0x97,0x48]
-# CHECK-ERROR: instruction requires the following: 'Zvbb' (Vector basic bit-manipulation instructions.){{$}}
+# CHECK-ERROR: instruction requires the following: 'Zvbb' (Vector basic bit-manipulation instructions){{$}}
# CHECK-UNKNOWN: 57 25 97 48 <unknown>
vctz.v v10, v9, v0.t
# CHECK-INST: vctz.v v10, v9, v0.t
# CHECK-ENCODING: [0x57,0xa5,0x96,0x48]
-# CHECK-ERROR: instruction requires the following: 'Zvbb' (Vector basic bit-manipulation instructions.){{$}}
+# CHECK-ERROR: instruction requires the following: 'Zvbb' (Vector basic bit-manipulation instructions){{$}}
# CHECK-UNKNOWN: 57 a5 96 48 <unknown>
vwsll.vv v10, v9, v8, v0.t
# CHECK-INST: vwsll.vv v10, v9, v8, v0.t
# CHECK-ENCODING: [0x57,0x05,0x94,0xd4]
-# CHECK-ERROR: instruction requires the following: 'Zvbb' (Vector basic bit-manipulation instructions.){{$}}
+# CHECK-ERROR: instruction requires the following: 'Zvbb' (Vector basic bit-manipulation instructions){{$}}
# CHECK-UNKNOWN: 57 05 94 d4 <unknown>
vwsll.vx v10, v9, a0, v0.t
# CHECK-INST: vwsll.vx v10, v9, a0, v0.t
# CHECK-ENCODING: [0x57,0x45,0x95,0xd4]
-# CHECK-ERROR: instruction requires the following: 'Zvbb' (Vector basic bit-manipulation instructions.){{$}}
+# CHECK-ERROR: instruction requires the following: 'Zvbb' (Vector basic bit-manipulation instructions){{$}}
# CHECK-UNKNOWN: 57 45 95 d4 <unknown>
vwsll.vi v10, v9, 29, v0.t
# CHECK-INST: vwsll.vi v10, v9, 29, v0.t
# CHECK-ENCODING: [0x57,0xb5,0x9e,0xd4]
-# CHECK-ERROR: instruction requires the following: 'Zvbb' (Vector basic bit-manipulation instructions.){{$}}
+# CHECK-ERROR: instruction requires the following: 'Zvbb' (Vector basic bit-manipulation instructions){{$}}
# CHECK-UNKNOWN: 57 b5 9e d4 <unknown>
More information about the llvm-commits
mailing list