[llvm] [AMDGPU] Set glc/slc on volatile/nontemporal SMEM loads (PR #77443)

[Tony Tye via llvm-commits]

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@@ -5813,6 +5813,18 @@ in table :ref:`amdgpu-amdhsa-memory-model-code-sequences-gfx6-gfx9-table`.
                                                               be reordered by
                                                               hardware.
 
+     load         *none*       *none*         - constant - !volatile & !nontemporal
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t-tye wrote:

AFAIK we do not generate scalar stores as the instruction was removed from the isa.

I do not think you need to say "only is the address is uniform" as the compiler cannot generate scalar loads unless that condition is already met.

https://github.com/llvm/llvm-project/pull/77443