[llvm] [SimplifyCFG] Fix Missing Case Computation for Arbitrary Width Integers (PR #77831)
Qiongsi Wu via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 11 13:41:59 PST 2024
https://github.com/qiongsiwu updated https://github.com/llvm/llvm-project/pull/77831
>From bf3bbc4ef3ae2afb5a2681f62c348c3d237a3c26 Mon Sep 17 00:00:00 2001
From: Qiongsi Wu <qwu at ibm.com>
Date: Thu, 11 Jan 2024 15:45:24 -0500
Subject: [PATCH 1/2] Fix missing case computation for wide integers.
---
llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 7 ++---
.../SimplifyCFG/switch-dead-default.ll | 26 +++++++++++++++++++
2 files changed, 30 insertions(+), 3 deletions(-)
diff --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index 7515e539e7fb78..47bda070ebc0a5 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -5623,11 +5623,12 @@ static bool eliminateDeadSwitchCases(SwitchInst *SI, DomTreeUpdater *DTU,
// optimization, such as lookup tables.
if (SI->getNumCases() == AllNumCases - 1) {
assert(NumUnknownBits > 1 && "Should be canonicalized to a branch");
- uint64_t MissingCaseVal = 0;
+ IntegerType *CondType = cast<IntegerType>(Cond->getType());
+ APInt MissingCaseVal = APInt::getZero(CondType->getBitWidth());
for (const auto &Case : SI->cases())
- MissingCaseVal ^= Case.getCaseValue()->getValue().getLimitedValue();
+ MissingCaseVal ^= Case.getCaseValue()->getValue();
auto *MissingCase =
- cast<ConstantInt>(ConstantInt::get(Cond->getType(), MissingCaseVal));
+ ConstantInt::get(SI->getModule()->getContext(), MissingCaseVal);
SwitchInstProfUpdateWrapper SIW(*SI);
SIW.addCase(MissingCase, SI->getDefaultDest(), SIW.getSuccessorWeight(0));
createUnreachableSwitchDefault(SI, DTU, /*RemoveOrigDefaultBlock*/ false);
diff --git a/llvm/test/Transforms/SimplifyCFG/switch-dead-default.ll b/llvm/test/Transforms/SimplifyCFG/switch-dead-default.ll
index e30a535c523237..4e47d4751ab15d 100644
--- a/llvm/test/Transforms/SimplifyCFG/switch-dead-default.ll
+++ b/llvm/test/Transforms/SimplifyCFG/switch-dead-default.ll
@@ -2,6 +2,7 @@
; RUN: opt %s -S -passes='simplifycfg<switch-to-lookup>' -simplifycfg-require-and-preserve-domtree=1 -switch-range-to-icmp | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+
declare void @foo(i32)
define void @test(i1 %a) {
@@ -313,6 +314,31 @@ default:
declare void @llvm.assume(i1)
+define zeroext i1 @test8(i128 %a) {
+; CHECK-LABEL: define zeroext i1 @test8(
+; CHECK-SAME: i128 [[A:%.*]]) {
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = and i128 [[A]], 3894222643901120721397872246915072
+; CHECK-NEXT: [[SWITCH:%.*]] = icmp ult i128 [[TMP0]], 1
+; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[SWITCH]], i1 false, i1 true
+; CHECK-NEXT: ret i1 [[SPEC_SELECT]]
+;
+entry:
+ %0 = and i128 %a, 3894222643901120721397872246915072
+ switch i128 %0, label %lor.rhs [
+ i128 1298074214633706907132624082305024, label %lor.end
+ i128 2596148429267413814265248164610048, label %lor.end
+ i128 3894222643901120721397872246915072, label %lor.end
+ ]
+
+lor.rhs: ; preds = %entry
+ br label %lor.end
+
+lor.end: ; preds = %entry, %entry, %entry, %lor.rhs
+ %1 = phi i1 [ true, %entry ], [ false, %lor.rhs ], [ true, %entry ], [ true, %entry ]
+ ret i1 %1
+}
+
!0 = !{!"branch_weights", i32 8, i32 4, i32 2, i32 1}
;.
; CHECK: [[PROF0]] = !{!"branch_weights", i32 0, i32 4, i32 2, i32 1, i32 8}
>From c64fade70b85d7d5f17226d9673aa920e270b757 Mon Sep 17 00:00:00 2001
From: Qiongsi Wu <qwu at ibm.com>
Date: Thu, 11 Jan 2024 16:41:45 -0500
Subject: [PATCH 2/2] Revise to not transform when the condition is wide.
---
llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 12 ++++++++----
.../Transforms/SimplifyCFG/switch-dead-default.ll | 15 +++++++++++----
2 files changed, 19 insertions(+), 8 deletions(-)
diff --git a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
index 47bda070ebc0a5..fe36fd84e0439b 100644
--- a/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
+++ b/llvm/lib/Transforms/Utils/SimplifyCFG.cpp
@@ -5623,12 +5623,16 @@ static bool eliminateDeadSwitchCases(SwitchInst *SI, DomTreeUpdater *DTU,
// optimization, such as lookup tables.
if (SI->getNumCases() == AllNumCases - 1) {
assert(NumUnknownBits > 1 && "Should be canonicalized to a branch");
- IntegerType *CondType = cast<IntegerType>(Cond->getType());
- APInt MissingCaseVal = APInt::getZero(CondType->getBitWidth());
+ IntegerType *CondTy = cast<IntegerType>(Cond->getType());
+ if (CondTy->getIntegerBitWidth() > 64 ||
+ !DL.fitsInLegalInteger(CondTy->getIntegerBitWidth()))
+ return false;
+
+ uint64_t MissingCaseVal = 0;
for (const auto &Case : SI->cases())
- MissingCaseVal ^= Case.getCaseValue()->getValue();
+ MissingCaseVal ^= Case.getCaseValue()->getValue().getLimitedValue();
auto *MissingCase =
- ConstantInt::get(SI->getModule()->getContext(), MissingCaseVal);
+ cast<ConstantInt>(ConstantInt::get(Cond->getType(), MissingCaseVal));
SwitchInstProfUpdateWrapper SIW(*SI);
SIW.addCase(MissingCase, SI->getDefaultDest(), SIW.getSuccessorWeight(0));
createUnreachableSwitchDefault(SI, DTU, /*RemoveOrigDefaultBlock*/ false);
diff --git a/llvm/test/Transforms/SimplifyCFG/switch-dead-default.ll b/llvm/test/Transforms/SimplifyCFG/switch-dead-default.ll
index 4e47d4751ab15d..4a457cc177e85c 100644
--- a/llvm/test/Transforms/SimplifyCFG/switch-dead-default.ll
+++ b/llvm/test/Transforms/SimplifyCFG/switch-dead-default.ll
@@ -2,7 +2,6 @@
; RUN: opt %s -S -passes='simplifycfg<switch-to-lookup>' -simplifycfg-require-and-preserve-domtree=1 -switch-range-to-icmp | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-
declare void @foo(i32)
define void @test(i1 %a) {
@@ -315,13 +314,21 @@ default:
declare void @llvm.assume(i1)
define zeroext i1 @test8(i128 %a) {
+; We should not transform conditions wider than 64 bit.
; CHECK-LABEL: define zeroext i1 @test8(
; CHECK-SAME: i128 [[A:%.*]]) {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = and i128 [[A]], 3894222643901120721397872246915072
-; CHECK-NEXT: [[SWITCH:%.*]] = icmp ult i128 [[TMP0]], 1
-; CHECK-NEXT: [[SPEC_SELECT:%.*]] = select i1 [[SWITCH]], i1 false, i1 true
-; CHECK-NEXT: ret i1 [[SPEC_SELECT]]
+; CHECK-NEXT: switch i128 [[TMP0]], label [[LOR_RHS:%.*]] [
+; CHECK-NEXT: i128 1298074214633706907132624082305024, label [[LOR_END:%.*]]
+; CHECK-NEXT: i128 2596148429267413814265248164610048, label [[LOR_END]]
+; CHECK-NEXT: i128 3894222643901120721397872246915072, label [[LOR_END]]
+; CHECK-NEXT: ]
+; CHECK: lor.rhs:
+; CHECK-NEXT: br label [[LOR_END]]
+; CHECK: lor.end:
+; CHECK-NEXT: [[TMP1:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ false, [[LOR_RHS]] ], [ true, [[ENTRY]] ], [ true, [[ENTRY]] ]
+; CHECK-NEXT: ret i1 [[TMP1]]
;
entry:
%0 = and i128 %a, 3894222643901120721397872246915072
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