[llvm] [RISCV] Support isel for Zacas for 2*XLen types. (PR #77814)

[Yingwei Zheng via llvm-commits]

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@@ -695,6 +704,35 @@ define i64 @atomic_load_i64_unordered(ptr %a) nounwind {
 ; RV64IA:       # %bb.0:
 ; RV64IA-NEXT:    ld a0, 0(a0)
 ; RV64IA-NEXT:    ret
+;
+; RV32IA-ZACAS-LABEL: atomic_load_i64_unordered:
+; RV32IA-ZACAS:       # %bb.0:
+; RV32IA-ZACAS-NEXT:    li a2, 0
+; RV32IA-ZACAS-NEXT:    li a3, 0
+; RV32IA-ZACAS-NEXT:    amocas.d a2, a2, (a0)
+; RV32IA-ZACAS-NEXT:    mv a0, a2
+; RV32IA-ZACAS-NEXT:    mv a1, a3
----------------
dtcxzyw wrote:

```suggestion
; RV32IA-ZACAS-NEXT:    mv a2, a0
; RV32IA-ZACAS-NEXT:    amocas.d a0, a0, (a2)
```
I don't know how to give some hints to RA for better codegen :(



https://github.com/llvm/llvm-project/pull/77814