[llvm] dc717b1 - [SLP][NFC]Add a test for final vector with minbitwidth, NFC.

[Alexey Bataev via llvm-commits]

Author: Alexey Bataev
Date: 2024-01-11T06:53:42-08:00
New Revision: dc717b19925c9e0a4fcca0ad277476400f62cc25

URL: https://github.com/llvm/llvm-project/commit/dc717b19925c9e0a4fcca0ad277476400f62cc25
DIFF: https://github.com/llvm/llvm-project/commit/dc717b19925c9e0a4fcca0ad277476400f62cc25.diff

LOG: [SLP][NFC]Add a test for final vector with minbitwidth, NFC.

Added: 
    llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-multiuse-with-insertelement.ll

Modified: 
    

Removed: 
    


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diff  --git a/llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-multiuse-with-insertelement.ll b/llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-multiuse-with-insertelement.ll
new file mode 100644
index 00000000000000..5ebbc4e5c3cec2
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-multiuse-with-insertelement.ll
@@ -0,0 +1,33 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
+; RUN: opt -passes=slp-vectorizer -S -slp-threshold=-10 -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+
+define void @test(i8 %0) {
+; CHECK-LABEL: define void @test(
+; CHECK-SAME: i8 [[TMP0:%.*]]) {
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TMP1:%.*]] = insertelement <2 x i8> <i8 0, i8 poison>, i8 [[TMP0]], i32 1
+; CHECK-NEXT:    [[TMP2:%.*]] = sext <2 x i8> [[TMP1]] to <2 x i32>
+; CHECK-NEXT:    [[TMP3:%.*]] = mul <2 x i32> [[TMP2]], zeroinitializer
+; CHECK-NEXT:    [[TMP4:%.*]] = extractelement <2 x i32> [[TMP3]], i32 0
+; CHECK-NEXT:    [[TMP5:%.*]] = extractelement <2 x i32> [[TMP3]], i32 1
+; CHECK-NEXT:    [[ADD:%.*]] = or i32 [[TMP4]], [[TMP5]]
+; CHECK-NEXT:    [[SHR:%.*]] = lshr i32 [[ADD]], 1
+; CHECK-NEXT:    [[CONV9:%.*]] = trunc i32 [[SHR]] to i8
+; CHECK-NEXT:    store i8 [[CONV9]], ptr null, align 1
+; CHECK-NEXT:    [[TMP6:%.*]] = shufflevector <2 x i32> [[TMP2]], <2 x i32> poison, <8 x i32> <i32 1, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
+; CHECK-NEXT:    ret void
+;
+entry:
+  %conv3 = sext i8 %0 to i32
+  %conv7 = sext i8 0 to i32
+  %conv = zext i16 0 to i32
+  %mul = mul i32 %conv3, %conv
+  %conv6 = zext i16 0 to i32
+  %mul8 = mul i32 %conv7, %conv6
+  %add = or i32 %mul8, %mul
+  %shr = lshr i32 %add, 1
+  %conv9 = trunc i32 %shr to i8
+  store i8 %conv9, ptr null, align 1
+  %broadcast.splatinsert = insertelement <8 x i32> poison, i32 %conv3, i64 0
+  ret void
+}