[llvm] [AMDGPU][MC] Fix the ABS, NEG, and OMOD bits in V_PERMLANE instruction encoding (PR #77713)

[Matt Arsenault via llvm-commits]

https://github.com/arsenm requested changes to this pull request.

Missing error tests ensuring the illegal fields aren't accepted by the assembler 

Do we need any codegen tests? I thought we had a patch out to allow these to be mangled to use float, in which case we should verify fneg doesn't fold in but it seems it never landed 

https://github.com/llvm/llvm-project/pull/77713