[llvm] 04f77a1 - [SLP][NFC]Replace constant by some meaningfull values to make test more

[Alexey Bataev via llvm-commits]

Author: Alexey Bataev
Date: 2024-01-10T10:34:32-08:00
New Revision: 04f77a1320e14560543e3b876f11804fa50a45ff

URL: https://github.com/llvm/llvm-project/commit/04f77a1320e14560543e3b876f11804fa50a45ff
DIFF: https://github.com/llvm/llvm-project/commit/04f77a1320e14560543e3b876f11804fa50a45ff.diff

LOG: [SLP][NFC]Replace constant by some meaningfull values to make test more
relevant, NFC.

Added: 
    

Modified: 
    llvm/test/Transforms/SLPVectorizer/X86/int-bitcast-minbitwidth.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/SLPVectorizer/X86/int-bitcast-minbitwidth.ll b/llvm/test/Transforms/SLPVectorizer/X86/int-bitcast-minbitwidth.ll
index a2bebef8af8732..fa0a3610cc22b4 100644
--- a/llvm/test/Transforms/SLPVectorizer/X86/int-bitcast-minbitwidth.ll
+++ b/llvm/test/Transforms/SLPVectorizer/X86/int-bitcast-minbitwidth.ll
@@ -1,24 +1,35 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
-; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu -slp-threshold=-3 < %s | FileCheck %s
 
-define void @t() {
-; CHECK-LABEL: define void @t() {
+define void @t(i64 %v) {
+; CHECK-LABEL: define void @t(
+; CHECK-SAME: i64 [[V:%.*]]) {
 ; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[TMP0:%.*]] = or i32 0, 0
+; CHECK-NEXT:    [[CONV12_1_I:%.*]] = trunc i64 [[V]] to i32
+; CHECK-NEXT:    [[MUL_I_1_I:%.*]] = mul i32 [[CONV12_1_I]], 2
+; CHECK-NEXT:    [[CONV12_I:%.*]] = trunc i64 [[V]] to i32
+; CHECK-NEXT:    [[MUL_I_I:%.*]] = mul i32 [[CONV12_I]], 3
+; CHECK-NEXT:    [[CONV14104_I:%.*]] = or i32 [[MUL_I_1_I]], [[MUL_I_I]]
+; CHECK-NEXT:    [[CONV12_1_I_1:%.*]] = trunc i64 [[V]] to i32
+; CHECK-NEXT:    [[MUL_I_1_I_1:%.*]] = mul i32 [[CONV12_1_I_1]], 6
+; CHECK-NEXT:    [[CONV12_I_1:%.*]] = trunc i64 [[V]] to i32
+; CHECK-NEXT:    [[MUL_I_I_1:%.*]] = mul i32 [[CONV12_I_1]], 5
+; CHECK-NEXT:    [[CONV14104_I_1:%.*]] = or i32 [[MUL_I_1_I_1]], [[MUL_I_I_1]]
+; CHECK-NEXT:    [[TMP0:%.*]] = or i32 [[CONV14104_I]], [[CONV14104_I_1]]
 ; CHECK-NEXT:    [[TMP1:%.*]] = and i32 [[TMP0]], 65535
 ; CHECK-NEXT:    store i32 [[TMP1]], ptr null, align 4
 ; CHECK-NEXT:    ret void
 ;
 entry:
-  %conv12.1.i = trunc i64 0 to i32
-  %mul.i.1.i = mul i32 %conv12.1.i, 0
-  %conv12.i = trunc i64 0 to i32
-  %mul.i.i = mul i32 %conv12.i, 0
+  %conv12.1.i = trunc i64 %v to i32
+  %mul.i.1.i = mul i32 %conv12.1.i, 2
+  %conv12.i = trunc i64 %v to i32
+  %mul.i.i = mul i32 %conv12.i, 3
   %conv14104.i = or i32 %mul.i.1.i, %mul.i.i
-  %conv12.1.i.1 = trunc i64 0 to i32
-  %mul.i.1.i.1 = mul i32 %conv12.1.i.1, 0
-  %conv12.i.1 = trunc i64 0 to i32
-  %mul.i.i.1 = mul i32 %conv12.i.1, 0
+  %conv12.1.i.1 = trunc i64 %v to i32
+  %mul.i.1.i.1 = mul i32 %conv12.1.i.1, 6
+  %conv12.i.1 = trunc i64 %v to i32
+  %mul.i.i.1 = mul i32 %conv12.i.1, 5
   %conv14104.i.1 = or i32 %mul.i.1.i.1, %mul.i.i.1
   %0 = or i32 %conv14104.i, %conv14104.i.1
   %1 = and i32 %0, 65535