[llvm] [InstCombine] Fold bitwise logic with intrinsics (PR #77460)

Yingwei Zheng via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 10 03:33:25 PST 2024

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https://github.com/dtcxzyw closed https://github.com/llvm/llvm-project/pull/77460

Previous message: [llvm] [InstCombine] Fold bitwise logic with intrinsics (PR #77460)
Next message: [llvm] [MacroFusion][RISCV] Allocate same register for second instruction of fusible pair (PR #77461)
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