[llvm] 9e5a77f - [SeparateConstOffsetFromGEP] Always emit i8 gep
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 10 02:57:38 PST 2024
Author: Nikita Popov
Date: 2024-01-10T11:57:28+01:00
New Revision: 9e5a77f252badfc932d1e28ee998746072ddc33f
URL: https://github.com/llvm/llvm-project/commit/9e5a77f252badfc932d1e28ee998746072ddc33f
DIFF: https://github.com/llvm/llvm-project/commit/9e5a77f252badfc932d1e28ee998746072ddc33f.diff
LOG: [SeparateConstOffsetFromGEP] Always emit i8 gep
Always emit canonical i8 GEPs, don't try to preserve the original
element type. As this is a backend pass, trying to preserve the
type is not useful.
Added:
Modified:
llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
llvm/test/Transforms/SeparateConstOffsetFromGEP/AArch64/scalable-vector-geps.ll
llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep-and-gvn-addrspace-addressing-modes.ll
llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep-and-gvn.ll
llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll
llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep.ll
llvm/test/Transforms/SeparateConstOffsetFromGEP/RISCV/split-gep.ll
llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/reassociate-geps-and-slsr-addrspace.ll
llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll
Removed:
################################################################################
diff --git a/llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp b/llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
index 225dd454068c84..d2fed11445e4da 100644
--- a/llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
+++ b/llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
@@ -1093,67 +1093,25 @@ bool SeparateConstOffsetFromGEP::splitGEP(GetElementPtrInst *GEP) {
// => add the offset
//
// %gep2 ; clone of %gep
- // %new.gep = gep %gep2, <offset / sizeof(*%gep)>
+ // %new.gep = gep i8, %gep2, %offset
// %gep ; will be removed
// ... %gep ...
//
// => replace all uses of %gep with %new.gep and remove %gep
//
// %gep2 ; clone of %gep
- // %new.gep = gep %gep2, <offset / sizeof(*%gep)>
- // ... %new.gep ...
- //
- // If AccumulativeByteOffset is not a multiple of sizeof(*%gep), we emit an
- // uglygep (http://llvm.org/docs/GetElementPtr.html#what-s-an-uglygep):
- // bitcast %gep2 to i8*, add the offset, and bitcast the result back to the
- // type of %gep.
- //
- // %gep2 ; clone of %gep
- // %0 = bitcast %gep2 to i8*
- // %uglygep = gep %0, <offset>
- // %new.gep = bitcast %uglygep to <type of %gep>
+ // %new.gep = gep i8, %gep2, %offset
// ... %new.gep ...
Instruction *NewGEP = GEP->clone();
NewGEP->insertBefore(GEP);
- // Per ANSI C standard, signed / unsigned = unsigned and signed % unsigned =
- // unsigned.. Therefore, we cast ElementTypeSizeOfGEP to signed because it is
- // used with unsigned integers later.
- int64_t ElementTypeSizeOfGEP = static_cast<int64_t>(
- DL->getTypeAllocSize(GEP->getResultElementType()));
Type *PtrIdxTy = DL->getIndexType(GEP->getType());
- if (AccumulativeByteOffset % ElementTypeSizeOfGEP == 0) {
- // Very likely. As long as %gep is naturally aligned, the byte offset we
- // extracted should be a multiple of sizeof(*%gep).
- int64_t Index = AccumulativeByteOffset / ElementTypeSizeOfGEP;
- NewGEP = GetElementPtrInst::Create(GEP->getResultElementType(), NewGEP,
- ConstantInt::get(PtrIdxTy, Index, true),
- GEP->getName(), GEP);
- NewGEP->copyMetadata(*GEP);
- // Inherit the inbounds attribute of the original GEP.
- cast<GetElementPtrInst>(NewGEP)->setIsInBounds(GEPWasInBounds);
- } else {
- // Unlikely but possible. For example,
- // #pragma pack(1)
- // struct S {
- // int a[3];
- // int64 b[8];
- // };
- // #pragma pack()
- //
- // Suppose the gep before extraction is &s[i + 1].b[j + 3]. After
- // extraction, it becomes &s[i].b[j] and AccumulativeByteOffset is
- // sizeof(S) + 3 * sizeof(int64) = 100, which is not a multiple of
- // sizeof(int64).
- //
- // Emit an uglygep in this case.
- IRBuilder<> Builder(GEP);
- NewGEP = cast<Instruction>(Builder.CreateGEP(
- Builder.getInt8Ty(), NewGEP,
- {ConstantInt::get(PtrIdxTy, AccumulativeByteOffset, true)}, "uglygep",
- GEPWasInBounds));
- NewGEP->copyMetadata(*GEP);
- }
+ IRBuilder<> Builder(GEP);
+ NewGEP = cast<Instruction>(Builder.CreateGEP(
+ Builder.getInt8Ty(), NewGEP,
+ {ConstantInt::get(PtrIdxTy, AccumulativeByteOffset, true)},
+ GEP->getName(), GEPWasInBounds));
+ NewGEP->copyMetadata(*GEP);
GEP->replaceAllUsesWith(NewGEP);
GEP->eraseFromParent();
diff --git a/llvm/test/Transforms/SeparateConstOffsetFromGEP/AArch64/scalable-vector-geps.ll b/llvm/test/Transforms/SeparateConstOffsetFromGEP/AArch64/scalable-vector-geps.ll
index 31d166506a4e48..63148f5f2d47aa 100644
--- a/llvm/test/Transforms/SeparateConstOffsetFromGEP/AArch64/scalable-vector-geps.ll
+++ b/llvm/test/Transforms/SeparateConstOffsetFromGEP/AArch64/scalable-vector-geps.ll
@@ -20,7 +20,7 @@ define ptr @test1(ptr %base, i64 %idx) #0 {
define ptr @test2(ptr %base, i64 %idx) {
; CHECK-LABEL: @test2(
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr <vscale x 4 x float>, ptr [[BASE:%.*]], i64 3, i64 [[IDX:%.*]]
-; CHECK-NEXT: [[GEP2:%.*]] = getelementptr float, ptr [[TMP1]], i64 1
+; CHECK-NEXT: [[GEP2:%.*]] = getelementptr i8, ptr [[TMP1]], i64 4
; CHECK-NEXT: ret ptr [[GEP2]]
;
%idx.next = add nuw nsw i64 %idx, 1
@@ -57,7 +57,7 @@ define ptr @test4(ptr %base, i64 %idx) {
define ptr @test5(ptr %base, i64 %idx) {
; CHECK-LABEL: @test5(
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr [8 x <vscale x 4 x float>], ptr [[BASE:%.*]], i64 1, i64 3, i64 [[IDX:%.*]]
-; CHECK-NEXT: [[GEP2:%.*]] = getelementptr float, ptr [[TMP1]], i64 1
+; CHECK-NEXT: [[GEP2:%.*]] = getelementptr i8, ptr [[TMP1]], i64 4
; CHECK-NEXT: ret ptr [[GEP2]]
;
%idx.next = add nuw nsw i64 %idx, 1
diff --git a/llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep-and-gvn-addrspace-addressing-modes.ll b/llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep-and-gvn-addrspace-addressing-modes.ll
index 2cd7fdfce35eb3..427681ac724ee5 100644
--- a/llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep-and-gvn-addrspace-addressing-modes.ll
+++ b/llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep-and-gvn-addrspace-addressing-modes.ll
@@ -11,9 +11,9 @@ define amdgpu_kernel void @sum_of_array(i32 %x, i32 %y, ptr addrspace(1) nocaptu
; IR-NEXT: [[TMP:%.*]] = sext i32 [[Y]] to i64
; IR-NEXT: [[TMP1:%.*]] = sext i32 [[X]] to i64
; IR-NEXT: [[TMP2:%.*]] = getelementptr [4096 x [32 x float]], ptr addrspace(4) @array, i64 0, i64 [[TMP1]], i64 [[TMP]]
-; IR-NEXT: [[TMP82:%.*]] = getelementptr inbounds float, ptr addrspace(4) [[TMP2]], i64 1
-; IR-NEXT: [[TMP144:%.*]] = getelementptr inbounds float, ptr addrspace(4) [[TMP2]], i64 32
-; IR-NEXT: [[TMP187:%.*]] = getelementptr inbounds float, ptr addrspace(4) [[TMP2]], i64 33
+; IR-NEXT: [[TMP82:%.*]] = getelementptr inbounds i8, ptr addrspace(4) [[TMP2]], i64 4
+; IR-NEXT: [[TMP144:%.*]] = getelementptr inbounds i8, ptr addrspace(4) [[TMP2]], i64 128
+; IR-NEXT: [[TMP187:%.*]] = getelementptr inbounds i8, ptr addrspace(4) [[TMP2]], i64 132
; IR-NEXT: store float 0.000000e+00, ptr addrspace(1) [[OUTPUT]], align 4
; IR-NEXT: ret void
;
@@ -51,7 +51,7 @@ define amdgpu_kernel void @sum_of_array_over_max_mubuf_offset(i32 %x, i32 %y, pt
; IR-NEXT: [[TMP2:%.*]] = getelementptr [4096 x [4 x float]], ptr addrspace(4) @array2, i64 0, i64 [[TMP1]], i64 [[TMP]]
; IR-NEXT: [[TMP6:%.*]] = add i32 [[Y]], 255
; IR-NEXT: [[TMP7:%.*]] = sext i32 [[TMP6]] to i64
-; IR-NEXT: [[TMP82:%.*]] = getelementptr inbounds float, ptr addrspace(4) [[TMP2]], i64 255
+; IR-NEXT: [[TMP82:%.*]] = getelementptr inbounds i8, ptr addrspace(4) [[TMP2]], i64 1020
; IR-NEXT: [[TMP12:%.*]] = add i32 [[X]], 256
; IR-NEXT: [[TMP13:%.*]] = sext i32 [[TMP12]] to i64
; IR-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4096 x [4 x float]], ptr addrspace(4) @array2, i64 0, i64 [[TMP13]], i64 [[TMP]]
@@ -91,13 +91,13 @@ define amdgpu_kernel void @sum_of_lds_array_over_max_mubuf_offset(i32 %x, i32 %y
; IR-NEXT: [[TMP2:%.*]] = getelementptr [4096 x [4 x float]], ptr addrspace(3) @lds_array, i32 0, i32 [[X]], i32 [[Y]]
; IR-NEXT: [[TMP4:%.*]] = load float, ptr addrspace(3) [[TMP2]], align 4
; IR-NEXT: [[TMP5:%.*]] = fadd float [[TMP4]], 0.000000e+00
-; IR-NEXT: [[TMP82:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[TMP2]], i32 255
+; IR-NEXT: [[TMP82:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP2]], i32 1020
; IR-NEXT: [[TMP10:%.*]] = load float, ptr addrspace(3) [[TMP82]], align 4
; IR-NEXT: [[TMP11:%.*]] = fadd float [[TMP5]], [[TMP10]]
-; IR-NEXT: [[TMP144:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[TMP2]], i32 16128
+; IR-NEXT: [[TMP144:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP2]], i32 64512
; IR-NEXT: [[TMP16:%.*]] = load float, ptr addrspace(3) [[TMP144]], align 4
; IR-NEXT: [[TMP17:%.*]] = fadd float [[TMP11]], [[TMP16]]
-; IR-NEXT: [[TMP187:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[TMP2]], i32 16383
+; IR-NEXT: [[TMP187:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP2]], i32 65532
; IR-NEXT: [[TMP20:%.*]] = load float, ptr addrspace(3) [[TMP187]], align 4
; IR-NEXT: [[TMP21:%.*]] = fadd float [[TMP17]], [[TMP20]]
; IR-NEXT: store float [[TMP21]], ptr addrspace(1) [[OUTPUT]], align 4
@@ -134,7 +134,7 @@ define amdgpu_ps <{ i32, i32, i32, i32, i32, float, float, float, float, float,
; IR-NEXT: [[TMP27:%.*]] = shl i32 [[TMP23]], 2
; IR-NEXT: [[TMP28:%.*]] = sext i32 [[TMP27]] to i64
; IR-NEXT: [[TMP29:%.*]] = getelementptr [0 x <4 x i32>], ptr addrspace(4) [[TMP1]], i64 0, i64 [[TMP28]], !amdgpu.uniform [[META0]]
-; IR-NEXT: [[TMP30:%.*]] = getelementptr <4 x i32>, ptr addrspace(4) [[TMP29]], i64 3, !amdgpu.uniform [[META0]]
+; IR-NEXT: [[TMP30:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP29]], i64 48, !amdgpu.uniform [[META0]]
; IR-NEXT: [[TMP31:%.*]] = load <4 x i32>, ptr addrspace(4) [[TMP30]], align 16, !invariant.load [[META0]]
; IR-NEXT: [[TMP32:%.*]] = call nsz <4 x float> @llvm.amdgcn.image.sample.v4f32.v2f32.v8i32(<2 x float> zeroinitializer, <8 x i32> [[TMP26]], <4 x i32> [[TMP31]], i32 15, i1 false, i1 false, i1 false, i1 false, i1 false) #[[ATTR3]]
; IR-NEXT: [[TMP33:%.*]] = extractelement <4 x float> [[TMP32]], i32 0
diff --git a/llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep-and-gvn.ll b/llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep-and-gvn.ll
index 6ef8a38dfd4595..b53c048187853d 100644
--- a/llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep-and-gvn.ll
+++ b/llvm/test/Transforms/SeparateConstOffsetFromGEP/AMDGPU/split-gep-and-gvn.ll
@@ -26,15 +26,15 @@ define void @sum_of_array(i32 %x, i32 %y, ptr nocapture %output) {
; IR-NEXT: [[I3:%.*]] = addrspacecast ptr addrspace(3) [[I2]] to ptr
; IR-NEXT: [[I4:%.*]] = load float, ptr [[I3]], align 4
; IR-NEXT: [[I5:%.*]] = fadd float [[I4]], 0.000000e+00
-; IR-NEXT: [[I87:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[I2]], i32 1
+; IR-NEXT: [[I87:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[I2]], i32 4
; IR-NEXT: [[I9:%.*]] = addrspacecast ptr addrspace(3) [[I87]] to ptr
; IR-NEXT: [[I10:%.*]] = load float, ptr [[I9]], align 4
; IR-NEXT: [[I11:%.*]] = fadd float [[I5]], [[I10]]
-; IR-NEXT: [[I1412:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[I2]], i32 32
+; IR-NEXT: [[I1412:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[I2]], i32 128
; IR-NEXT: [[I15:%.*]] = addrspacecast ptr addrspace(3) [[I1412]] to ptr
; IR-NEXT: [[I16:%.*]] = load float, ptr [[I15]], align 4
; IR-NEXT: [[I17:%.*]] = fadd float [[I11]], [[I16]]
-; IR-NEXT: [[I1818:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[I2]], i32 33
+; IR-NEXT: [[I1818:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[I2]], i32 132
; IR-NEXT: [[I19:%.*]] = addrspacecast ptr addrspace(3) [[I1818]] to ptr
; IR-NEXT: [[I20:%.*]] = load float, ptr [[I19]], align 4
; IR-NEXT: [[I21:%.*]] = fadd float [[I17]], [[I20]]
@@ -88,15 +88,15 @@ define void @sum_of_array2(i32 %x, i32 %y, ptr nocapture %output) {
; IR-NEXT: [[I3:%.*]] = addrspacecast ptr addrspace(3) [[I2]] to ptr
; IR-NEXT: [[I4:%.*]] = load float, ptr [[I3]], align 4
; IR-NEXT: [[I5:%.*]] = fadd float [[I4]], 0.000000e+00
-; IR-NEXT: [[I77:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[I2]], i32 1
+; IR-NEXT: [[I77:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[I2]], i32 4
; IR-NEXT: [[I8:%.*]] = addrspacecast ptr addrspace(3) [[I77]] to ptr
; IR-NEXT: [[I9:%.*]] = load float, ptr [[I8]], align 4
; IR-NEXT: [[I10:%.*]] = fadd float [[I5]], [[I9]]
-; IR-NEXT: [[I1212:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[I2]], i32 32
+; IR-NEXT: [[I1212:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[I2]], i32 128
; IR-NEXT: [[I13:%.*]] = addrspacecast ptr addrspace(3) [[I1212]] to ptr
; IR-NEXT: [[I14:%.*]] = load float, ptr [[I13]], align 4
; IR-NEXT: [[I15:%.*]] = fadd float [[I10]], [[I14]]
-; IR-NEXT: [[I1618:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[I2]], i32 33
+; IR-NEXT: [[I1618:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[I2]], i32 132
; IR-NEXT: [[I17:%.*]] = addrspacecast ptr addrspace(3) [[I1618]] to ptr
; IR-NEXT: [[I18:%.*]] = load float, ptr [[I17]], align 4
; IR-NEXT: [[I19:%.*]] = fadd float [[I15]], [[I18]]
@@ -149,15 +149,15 @@ define void @sum_of_array3(i32 %x, i32 %y, ptr nocapture %output) {
; IR-NEXT: [[I3:%.*]] = addrspacecast ptr addrspace(3) [[I2]] to ptr
; IR-NEXT: [[I4:%.*]] = load float, ptr [[I3]], align 4
; IR-NEXT: [[I5:%.*]] = fadd float [[I4]], 0.000000e+00
-; IR-NEXT: [[I87:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[I2]], i32 1
+; IR-NEXT: [[I87:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[I2]], i32 4
; IR-NEXT: [[I9:%.*]] = addrspacecast ptr addrspace(3) [[I87]] to ptr
; IR-NEXT: [[I10:%.*]] = load float, ptr [[I9]], align 4
; IR-NEXT: [[I11:%.*]] = fadd float [[I5]], [[I10]]
-; IR-NEXT: [[I1412:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[I2]], i32 32
+; IR-NEXT: [[I1412:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[I2]], i32 128
; IR-NEXT: [[I15:%.*]] = addrspacecast ptr addrspace(3) [[I1412]] to ptr
; IR-NEXT: [[I16:%.*]] = load float, ptr [[I15]], align 4
; IR-NEXT: [[I17:%.*]] = fadd float [[I11]], [[I16]]
-; IR-NEXT: [[I1818:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[I2]], i32 33
+; IR-NEXT: [[I1818:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[I2]], i32 132
; IR-NEXT: [[I19:%.*]] = addrspacecast ptr addrspace(3) [[I1818]] to ptr
; IR-NEXT: [[I20:%.*]] = load float, ptr [[I19]], align 4
; IR-NEXT: [[I21:%.*]] = fadd float [[I17]], [[I20]]
@@ -209,15 +209,15 @@ define void @sum_of_array4(i32 %x, i32 %y, ptr nocapture %output) {
; IR-NEXT: [[I3:%.*]] = addrspacecast ptr addrspace(3) [[I2]] to ptr
; IR-NEXT: [[I4:%.*]] = load float, ptr [[I3]], align 4
; IR-NEXT: [[I5:%.*]] = fadd float [[I4]], 0.000000e+00
-; IR-NEXT: [[I77:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[I2]], i32 1
+; IR-NEXT: [[I77:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[I2]], i32 4
; IR-NEXT: [[I8:%.*]] = addrspacecast ptr addrspace(3) [[I77]] to ptr
; IR-NEXT: [[I9:%.*]] = load float, ptr [[I8]], align 4
; IR-NEXT: [[I10:%.*]] = fadd float [[I5]], [[I9]]
-; IR-NEXT: [[I1212:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[I2]], i32 32
+; IR-NEXT: [[I1212:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[I2]], i32 128
; IR-NEXT: [[I13:%.*]] = addrspacecast ptr addrspace(3) [[I1212]] to ptr
; IR-NEXT: [[I14:%.*]] = load float, ptr [[I13]], align 4
; IR-NEXT: [[I15:%.*]] = fadd float [[I10]], [[I14]]
-; IR-NEXT: [[I1618:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[I2]], i32 33
+; IR-NEXT: [[I1618:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[I2]], i32 132
; IR-NEXT: [[I17:%.*]] = addrspacecast ptr addrspace(3) [[I1618]] to ptr
; IR-NEXT: [[I18:%.*]] = load float, ptr [[I17]], align 4
; IR-NEXT: [[I19:%.*]] = fadd float [[I15]], [[I18]]
@@ -270,7 +270,7 @@ define void @reunion(i32 %x, i32 %y, ptr %input) {
; IR-NEXT: [[P0:%.*]] = getelementptr float, ptr [[INPUT]], i64 [[I]]
; IR-NEXT: [[V0:%.*]] = load float, ptr [[P0]], align 4
; IR-NEXT: call void @use(float [[V0]])
-; IR-NEXT: [[P13:%.*]] = getelementptr inbounds float, ptr [[P0]], i64 5
+; IR-NEXT: [[P13:%.*]] = getelementptr inbounds i8, ptr [[P0]], i64 20
; IR-NEXT: [[V1:%.*]] = load float, ptr [[P13]], align 4
; IR-NEXT: call void @use(float [[V1]])
; IR-NEXT: ret void
diff --git a/llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll b/llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll
index 1391cb4e7b4971..79398a80ac659a 100644
--- a/llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll
+++ b/llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep-and-gvn.ll
@@ -28,15 +28,15 @@ define void @sum_of_array(i32 %x, i32 %y, ptr nocapture %output) {
; IR-NEXT: [[TMP3:%.*]] = addrspacecast ptr addrspace(3) [[TMP2]] to ptr
; IR-NEXT: [[TMP4:%.*]] = load float, ptr [[TMP3]], align 4
; IR-NEXT: [[TMP5:%.*]] = fadd float [[TMP4]], 0.000000e+00
-; IR-NEXT: [[TMP6:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[TMP2]], i64 1
+; IR-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP2]], i64 4
; IR-NEXT: [[TMP7:%.*]] = addrspacecast ptr addrspace(3) [[TMP6]] to ptr
; IR-NEXT: [[TMP8:%.*]] = load float, ptr [[TMP7]], align 4
; IR-NEXT: [[TMP9:%.*]] = fadd float [[TMP5]], [[TMP8]]
-; IR-NEXT: [[TMP10:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[TMP2]], i64 32
+; IR-NEXT: [[TMP10:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP2]], i64 128
; IR-NEXT: [[TMP11:%.*]] = addrspacecast ptr addrspace(3) [[TMP10]] to ptr
; IR-NEXT: [[TMP12:%.*]] = load float, ptr [[TMP11]], align 4
; IR-NEXT: [[TMP13:%.*]] = fadd float [[TMP9]], [[TMP12]]
-; IR-NEXT: [[TMP14:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[TMP2]], i64 33
+; IR-NEXT: [[TMP14:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP2]], i64 132
; IR-NEXT: [[TMP15:%.*]] = addrspacecast ptr addrspace(3) [[TMP14]] to ptr
; IR-NEXT: [[TMP16:%.*]] = load float, ptr [[TMP15]], align 4
; IR-NEXT: [[TMP17:%.*]] = fadd float [[TMP13]], [[TMP16]]
@@ -94,15 +94,15 @@ define void @sum_of_array2(i32 %x, i32 %y, ptr nocapture %output) {
; IR-NEXT: [[TMP3:%.*]] = addrspacecast ptr addrspace(3) [[TMP2]] to ptr
; IR-NEXT: [[TMP4:%.*]] = load float, ptr [[TMP3]], align 4
; IR-NEXT: [[TMP5:%.*]] = fadd float [[TMP4]], 0.000000e+00
-; IR-NEXT: [[TMP6:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[TMP2]], i64 1
+; IR-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP2]], i64 4
; IR-NEXT: [[TMP7:%.*]] = addrspacecast ptr addrspace(3) [[TMP6]] to ptr
; IR-NEXT: [[TMP8:%.*]] = load float, ptr [[TMP7]], align 4
; IR-NEXT: [[TMP9:%.*]] = fadd float [[TMP5]], [[TMP8]]
-; IR-NEXT: [[TMP10:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[TMP2]], i64 32
+; IR-NEXT: [[TMP10:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP2]], i64 128
; IR-NEXT: [[TMP11:%.*]] = addrspacecast ptr addrspace(3) [[TMP10]] to ptr
; IR-NEXT: [[TMP12:%.*]] = load float, ptr [[TMP11]], align 4
; IR-NEXT: [[TMP13:%.*]] = fadd float [[TMP9]], [[TMP12]]
-; IR-NEXT: [[TMP14:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[TMP2]], i64 33
+; IR-NEXT: [[TMP14:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP2]], i64 132
; IR-NEXT: [[TMP15:%.*]] = addrspacecast ptr addrspace(3) [[TMP14]] to ptr
; IR-NEXT: [[TMP16:%.*]] = load float, ptr [[TMP15]], align 4
; IR-NEXT: [[TMP17:%.*]] = fadd float [[TMP13]], [[TMP16]]
@@ -161,15 +161,15 @@ define void @sum_of_array3(i32 %x, i32 %y, ptr nocapture %output) {
; IR-NEXT: [[TMP3:%.*]] = addrspacecast ptr addrspace(3) [[TMP2]] to ptr
; IR-NEXT: [[TMP4:%.*]] = load float, ptr [[TMP3]], align 4
; IR-NEXT: [[TMP5:%.*]] = fadd float [[TMP4]], 0.000000e+00
-; IR-NEXT: [[TMP6:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[TMP2]], i64 1
+; IR-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP2]], i64 4
; IR-NEXT: [[TMP7:%.*]] = addrspacecast ptr addrspace(3) [[TMP6]] to ptr
; IR-NEXT: [[TMP8:%.*]] = load float, ptr [[TMP7]], align 4
; IR-NEXT: [[TMP9:%.*]] = fadd float [[TMP5]], [[TMP8]]
-; IR-NEXT: [[TMP10:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[TMP2]], i64 32
+; IR-NEXT: [[TMP10:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP2]], i64 128
; IR-NEXT: [[TMP11:%.*]] = addrspacecast ptr addrspace(3) [[TMP10]] to ptr
; IR-NEXT: [[TMP12:%.*]] = load float, ptr [[TMP11]], align 4
; IR-NEXT: [[TMP13:%.*]] = fadd float [[TMP9]], [[TMP12]]
-; IR-NEXT: [[TMP14:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[TMP2]], i64 33
+; IR-NEXT: [[TMP14:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP2]], i64 132
; IR-NEXT: [[TMP15:%.*]] = addrspacecast ptr addrspace(3) [[TMP14]] to ptr
; IR-NEXT: [[TMP16:%.*]] = load float, ptr [[TMP15]], align 4
; IR-NEXT: [[TMP17:%.*]] = fadd float [[TMP13]], [[TMP16]]
@@ -228,15 +228,15 @@ define void @sum_of_array4(i32 %x, i32 %y, ptr nocapture %output) {
; IR-NEXT: [[TMP3:%.*]] = addrspacecast ptr addrspace(3) [[TMP2]] to ptr
; IR-NEXT: [[TMP4:%.*]] = load float, ptr [[TMP3]], align 4
; IR-NEXT: [[TMP5:%.*]] = fadd float [[TMP4]], 0.000000e+00
-; IR-NEXT: [[TMP6:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[TMP2]], i64 1
+; IR-NEXT: [[TMP6:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP2]], i64 4
; IR-NEXT: [[TMP7:%.*]] = addrspacecast ptr addrspace(3) [[TMP6]] to ptr
; IR-NEXT: [[TMP8:%.*]] = load float, ptr [[TMP7]], align 4
; IR-NEXT: [[TMP9:%.*]] = fadd float [[TMP5]], [[TMP8]]
-; IR-NEXT: [[TMP10:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[TMP2]], i64 32
+; IR-NEXT: [[TMP10:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP2]], i64 128
; IR-NEXT: [[TMP11:%.*]] = addrspacecast ptr addrspace(3) [[TMP10]] to ptr
; IR-NEXT: [[TMP12:%.*]] = load float, ptr [[TMP11]], align 4
; IR-NEXT: [[TMP13:%.*]] = fadd float [[TMP9]], [[TMP12]]
-; IR-NEXT: [[TMP14:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[TMP2]], i64 33
+; IR-NEXT: [[TMP14:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP2]], i64 132
; IR-NEXT: [[TMP15:%.*]] = addrspacecast ptr addrspace(3) [[TMP14]] to ptr
; IR-NEXT: [[TMP16:%.*]] = load float, ptr [[TMP15]], align 4
; IR-NEXT: [[TMP17:%.*]] = fadd float [[TMP13]], [[TMP16]]
@@ -296,7 +296,7 @@ define void @reunion(i32 %x, i32 %y, ptr %input) {
; IR-NEXT: [[P0:%.*]] = getelementptr float, ptr [[INPUT]], i64 [[TMP0]]
; IR-NEXT: [[V0:%.*]] = load float, ptr [[P0]], align 4
; IR-NEXT: call void @use(float [[V0]])
-; IR-NEXT: [[P13:%.*]] = getelementptr inbounds float, ptr [[P0]], i64 5
+; IR-NEXT: [[P13:%.*]] = getelementptr inbounds i8, ptr [[P0]], i64 20
; IR-NEXT: [[V1:%.*]] = load float, ptr [[P13]], align 4
; IR-NEXT: call void @use(float [[V1]])
; IR-NEXT: ret void
diff --git a/llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep.ll b/llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep.ll
index 67d78fc90512f5..49c6a46b136d52 100644
--- a/llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep.ll
+++ b/llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep.ll
@@ -19,7 +19,7 @@ define ptr @struct(i32 %i) {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[I]] to i64
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr [1024 x %struct.S], ptr @struct_array, i64 0, i64 [[TMP0]], i32 1
-; CHECK-NEXT: [[P2:%.*]] = getelementptr inbounds double, ptr [[TMP1]], i64 10
+; CHECK-NEXT: [[P2:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i64 80
; CHECK-NEXT: ret ptr [[P2]]
;
entry:
@@ -40,7 +40,7 @@ define ptr @sext_add(i32 %i, i32 %j) {
; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[TMP0]] to i64
; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[I]] to i64
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr [32 x [32 x float]], ptr @float_2d_array, i64 0, i64 [[TMP2]], i64 [[TMP1]]
-; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds float, ptr [[TMP3]], i64 32
+; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds i8, ptr [[TMP3]], i64 128
; CHECK-NEXT: ret ptr [[P1]]
;
entry:
@@ -68,7 +68,7 @@ define ptr @ext_add_no_overflow(i64 %a, i32 %b, i64 %c, i32 %d) {
; CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[D]] to i64
; CHECK-NEXT: [[J4:%.*]] = add i64 [[C]], [[TMP2]]
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr [32 x [32 x float]], ptr @float_2d_array, i64 0, i64 [[I2]], i64 [[J4]]
-; CHECK-NEXT: [[P5:%.*]] = getelementptr inbounds float, ptr [[TMP3]], i64 33
+; CHECK-NEXT: [[P5:%.*]] = getelementptr inbounds i8, ptr [[TMP3]], i64 132
; CHECK-NEXT: ret ptr [[P5]]
;
%b1 = add nsw i32 %b, 1
@@ -92,7 +92,7 @@ define void @sext_zext(i32 %a, i32 %b, ptr %out1, ptr %out2) {
; CHECK-NEXT: [[TMP3:%.*]] = sext i32 [[A]] to i48
; CHECK-NEXT: [[TMP4:%.*]] = zext i48 [[TMP3]] to i64
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr [32 x [32 x float]], ptr @float_2d_array, i64 0, i64 [[TMP4]], i64 [[TMP2]]
-; CHECK-NEXT: [[P11:%.*]] = getelementptr float, ptr [[TMP5]], i64 32
+; CHECK-NEXT: [[P11:%.*]] = getelementptr i8, ptr [[TMP5]], i64 128
; CHECK-NEXT: store ptr [[P11]], ptr [[OUT1]], align 8
; CHECK-NEXT: [[TMP6:%.*]] = add nsw i32 [[B]], 4
; CHECK-NEXT: [[TMP7:%.*]] = zext i32 [[TMP6]] to i48
@@ -100,7 +100,7 @@ define void @sext_zext(i32 %a, i32 %b, ptr %out1, ptr %out2) {
; CHECK-NEXT: [[TMP9:%.*]] = zext i32 [[A]] to i48
; CHECK-NEXT: [[TMP10:%.*]] = sext i48 [[TMP9]] to i64
; CHECK-NEXT: [[TMP11:%.*]] = getelementptr [32 x [32 x float]], ptr @float_2d_array, i64 0, i64 [[TMP10]], i64 [[TMP8]]
-; CHECK-NEXT: [[P22:%.*]] = getelementptr float, ptr [[TMP11]], i64 96
+; CHECK-NEXT: [[P22:%.*]] = getelementptr i8, ptr [[TMP11]], i64 384
; CHECK-NEXT: store ptr [[P22]], ptr [[OUT2]], align 8
; CHECK-NEXT: ret void
;
@@ -137,7 +137,7 @@ define ptr @sext_or(i64 %a, i32 %b) {
; CHECK-NEXT: [[TMP0:%.*]] = zext i32 [[B1]] to i64
; CHECK-NEXT: [[I2:%.*]] = add i64 [[A]], [[TMP0]]
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr [32 x [32 x float]], ptr @float_2d_array, i64 0, i64 [[I2]], i64 [[J]]
-; CHECK-NEXT: [[P3:%.*]] = getelementptr inbounds float, ptr [[TMP1]], i64 32
+; CHECK-NEXT: [[P3:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i64 128
; CHECK-NEXT: ret ptr [[P3]]
;
entry:
@@ -162,7 +162,7 @@ define ptr @expr(i64 %a, i64 %b, ptr %out) {
; CHECK-NEXT: [[B5:%.*]] = add i64 [[B]], 5
; CHECK-NEXT: [[I2:%.*]] = add i64 [[B]], [[A]]
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr [32 x [32 x float]], ptr @float_2d_array, i64 0, i64 [[I2]], i64 0
-; CHECK-NEXT: [[P3:%.*]] = getelementptr inbounds float, ptr [[TMP0]], i64 160
+; CHECK-NEXT: [[P3:%.*]] = getelementptr inbounds i8, ptr [[TMP0]], i64 640
; CHECK-NEXT: store i64 [[B5]], ptr [[OUT]], align 8
; CHECK-NEXT: ret ptr [[P3]]
;
@@ -186,7 +186,7 @@ define ptr @sext_expr(i32 %a, i32 %b, i32 %c, i64 %d) {
; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[TMP0]], [[TMP3]]
; CHECK-NEXT: [[I1:%.*]] = add i64 [[D]], [[TMP4]]
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr [32 x [32 x float]], ptr @float_2d_array, i64 0, i64 0, i64 [[I1]]
-; CHECK-NEXT: [[P2:%.*]] = getelementptr inbounds float, ptr [[TMP5]], i64 8
+; CHECK-NEXT: [[P2:%.*]] = getelementptr inbounds i8, ptr [[TMP5]], i64 32
; CHECK-NEXT: ret ptr [[P2]]
;
entry:
@@ -205,7 +205,7 @@ define ptr @sub(i64 %i, i64 %j) {
; CHECK-SAME: i64 [[I:%.*]], i64 [[J:%.*]]) {
; CHECK-NEXT: [[J22:%.*]] = sub i64 0, [[J]]
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr [32 x [32 x float]], ptr @float_2d_array, i64 0, i64 [[I]], i64 [[J22]]
-; CHECK-NEXT: [[P3:%.*]] = getelementptr inbounds float, ptr [[TMP1]], i64 -155
+; CHECK-NEXT: [[P3:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i64 -620
; CHECK-NEXT: ret ptr [[P3]]
;
%i2 = sub i64 %i, 5 ; i - 5
@@ -225,8 +225,8 @@ define ptr @packed_struct(i32 %i, i32 %j) {
; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[I]] to i64
; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[J]] to i64
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr [1024 x %struct.Packed], ptr [[S]], i64 0, i64 [[TMP0]], i32 1, i64 [[TMP1]]
-; CHECK-NEXT: [[UGLYGEP:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i64 100
-; CHECK-NEXT: ret ptr [[UGLYGEP]]
+; CHECK-NEXT: [[ARRAYIDX33:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i64 100
+; CHECK-NEXT: ret ptr [[ARRAYIDX33]]
;
entry:
%s = alloca [1024 x %struct.Packed], align 16
@@ -292,7 +292,7 @@ define ptr @apint(i1 %a) {
; CHECK-NEXT: [[TMP0:%.*]] = sext i1 [[A]] to i4
; CHECK-NEXT: [[TMP1:%.*]] = zext i4 [[TMP0]] to i64
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr [32 x [32 x float]], ptr @float_2d_array, i64 0, i64 0, i64 [[TMP1]]
-; CHECK-NEXT: [[P1:%.*]] = getelementptr float, ptr [[TMP2]], i64 15
+; CHECK-NEXT: [[P1:%.*]] = getelementptr i8, ptr [[TMP2]], i64 60
; CHECK-NEXT: ret ptr [[P1]]
;
entry:
@@ -329,7 +329,7 @@ define ptr @shl_add_or(i64 %a, ptr %ptr) {
; CHECK-NEXT: [[SHL:%.*]] = shl i64 [[A]], 2
; CHECK-NEXT: [[OR2:%.*]] = add i64 [[SHL]], 1
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr float, ptr [[PTR]], i64 [[OR2]]
-; CHECK-NEXT: [[P3:%.*]] = getelementptr float, ptr [[TMP0]], i64 12
+; CHECK-NEXT: [[P3:%.*]] = getelementptr i8, ptr [[TMP0]], i64 48
; CHECK-NEXT: ret ptr [[P3]]
;
entry:
@@ -358,8 +358,8 @@ define ptr @sign_mod_unsign(ptr %ptr, i64 %idx) {
; CHECK-SAME: ptr [[PTR:%.*]], i64 [[IDX:%.*]]) {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr [[STRUCT0:%.*]], ptr [[PTR]], i64 0, i32 3, i64 [[IDX]], i32 1
-; CHECK-NEXT: [[UGLYGEP:%.*]] = getelementptr inbounds i8, ptr [[TMP0]], i64 -64
-; CHECK-NEXT: ret ptr [[UGLYGEP]]
+; CHECK-NEXT: [[PTR22:%.*]] = getelementptr inbounds i8, ptr [[TMP0]], i64 -64
+; CHECK-NEXT: ret ptr [[PTR22]]
;
entry:
%arrayidx = add nsw i64 %idx, -2
@@ -373,7 +373,7 @@ define ptr @trunk_explicit(ptr %ptr, i64 %idx) {
; CHECK-SAME: ptr [[PTR:%.*]], i64 [[IDX:%.*]]) {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr [[STRUCT0:%.*]], ptr [[PTR]], i64 0, i32 3, i64 [[IDX]], i32 1
-; CHECK-NEXT: [[PTR21:%.*]] = getelementptr inbounds [[STRUCT2:%.*]], ptr [[TMP0]], i64 134
+; CHECK-NEXT: [[PTR21:%.*]] = getelementptr inbounds i8, ptr [[TMP0]], i64 3216
; CHECK-NEXT: ret ptr [[PTR21]]
;
entry:
@@ -390,7 +390,7 @@ define ptr @trunk_long_idx(ptr %ptr, i64 %idx) {
; CHECK-SAME: ptr [[PTR:%.*]], i64 [[IDX:%.*]]) {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr [[STRUCT0:%.*]], ptr [[PTR]], i64 0, i32 3, i64 [[IDX]], i32 1
-; CHECK-NEXT: [[PTR21:%.*]] = getelementptr inbounds [[STRUCT2:%.*]], ptr [[TMP0]], i64 134
+; CHECK-NEXT: [[PTR21:%.*]] = getelementptr inbounds i8, ptr [[TMP0]], i64 3216
; CHECK-NEXT: ret ptr [[PTR21]]
;
entry:
diff --git a/llvm/test/Transforms/SeparateConstOffsetFromGEP/RISCV/split-gep.ll b/llvm/test/Transforms/SeparateConstOffsetFromGEP/RISCV/split-gep.ll
index ed0a1185985cc6..3742ea7fb0c2e5 100644
--- a/llvm/test/Transforms/SeparateConstOffsetFromGEP/RISCV/split-gep.ll
+++ b/llvm/test/Transforms/SeparateConstOffsetFromGEP/RISCV/split-gep.ll
@@ -12,11 +12,11 @@ define i64 @test1(ptr %array, i64 %i, i64 %j) {
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[I:%.*]], 5
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i64, ptr [[ARRAY:%.*]], i64 [[I]]
-; CHECK-NEXT: [[GEP4:%.*]] = getelementptr inbounds i64, ptr [[TMP0]], i64 5
+; CHECK-NEXT: [[GEP4:%.*]] = getelementptr inbounds i8, ptr [[TMP0]], i64 40
; CHECK-NEXT: store i64 [[J:%.*]], ptr [[GEP4]], align 8
-; CHECK-NEXT: [[GEP26:%.*]] = getelementptr inbounds i64, ptr [[TMP0]], i64 6
+; CHECK-NEXT: [[GEP26:%.*]] = getelementptr inbounds i8, ptr [[TMP0]], i64 48
; CHECK-NEXT: store i64 [[J]], ptr [[GEP26]], align 8
-; CHECK-NEXT: [[GEP38:%.*]] = getelementptr inbounds i64, ptr [[TMP0]], i64 35
+; CHECK-NEXT: [[GEP38:%.*]] = getelementptr inbounds i8, ptr [[TMP0]], i64 280
; CHECK-NEXT: store i64 [[ADD]], ptr [[GEP38]], align 8
; CHECK-NEXT: ret i64 undef
;
@@ -40,11 +40,11 @@ define i32 @test2(ptr %array, i32 %i, i32 %j) {
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[I:%.*]], 5
; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[I]] to i64
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i32, ptr [[ARRAY:%.*]], i64 [[TMP0]]
-; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 5
+; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i64 20
; CHECK-NEXT: store i32 [[J:%.*]], ptr [[GEP2]], align 4
-; CHECK-NEXT: [[GEP54:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 6
+; CHECK-NEXT: [[GEP54:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i64 24
; CHECK-NEXT: store i32 [[J]], ptr [[GEP54]], align 4
-; CHECK-NEXT: [[GEP86:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 35
+; CHECK-NEXT: [[GEP86:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i64 140
; CHECK-NEXT: store i32 [[ADD]], ptr [[GEP86]], align 4
; CHECK-NEXT: ret i32 undef
;
@@ -72,13 +72,13 @@ define i32 @test3(ptr %array, i32 %i) {
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[I:%.*]], 5
; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[I]] to i64
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i32, ptr [[ARRAY:%.*]], i64 [[TMP0]]
-; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 5
+; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i64 20
; CHECK-NEXT: store i32 [[ADD]], ptr [[GEP2]], align 4
; CHECK-NEXT: [[ADD3:%.*]] = add nsw i32 [[I]], 6
-; CHECK-NEXT: [[GEP54:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 6
+; CHECK-NEXT: [[GEP54:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i64 24
; CHECK-NEXT: store i32 [[ADD3]], ptr [[GEP54]], align 4
; CHECK-NEXT: [[ADD6:%.*]] = add nsw i32 [[I]], 35
-; CHECK-NEXT: [[GEP86:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 35
+; CHECK-NEXT: [[GEP86:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i64 140
; CHECK-NEXT: store i32 [[ADD6]], ptr [[GEP86]], align 4
; CHECK-NEXT: ret i32 undef
;
@@ -105,11 +105,11 @@ define i32 @test4(ptr %array2, i32 %i) {
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[I:%.*]], 5
; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[I]] to i64
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr [50 x i32], ptr [[ARRAY2:%.*]], i64 [[TMP0]], i64 [[TMP0]]
-; CHECK-NEXT: [[GEP3:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 255
+; CHECK-NEXT: [[GEP3:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i64 1020
; CHECK-NEXT: store i32 [[I]], ptr [[GEP3]], align 4
-; CHECK-NEXT: [[GEP56:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 256
+; CHECK-NEXT: [[GEP56:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i64 1024
; CHECK-NEXT: store i32 [[ADD]], ptr [[GEP56]], align 4
-; CHECK-NEXT: [[GEP89:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 285
+; CHECK-NEXT: [[GEP89:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i64 1140
; CHECK-NEXT: store i32 [[I]], ptr [[GEP89]], align 4
; CHECK-NEXT: ret i32 undef
;
@@ -136,10 +136,10 @@ define i32 @test5(ptr %array2, i32 %i, i64 %j) {
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[I:%.*]], 5
; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[I]] to i64
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr [50 x i32], ptr [[ARRAY2:%.*]], i64 [[TMP0]], i64 [[TMP0]]
-; CHECK-NEXT: [[GEP3:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 255
+; CHECK-NEXT: [[GEP3:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i64 1020
; CHECK-NEXT: store i32 [[ADD]], ptr [[GEP3]], align 4
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr [50 x i32], ptr [[ARRAY2]], i64 [[TMP0]], i64 [[J:%.*]]
-; CHECK-NEXT: [[GEP55:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 300
+; CHECK-NEXT: [[GEP55:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i64 1200
; CHECK-NEXT: store i32 [[I]], ptr [[GEP55]], align 4
; CHECK-NEXT: [[ADD6:%.*]] = add nsw i32 [[I]], 35
; CHECK-NEXT: [[SEXT7:%.*]] = sext i32 [[ADD6]] to i64
@@ -171,7 +171,7 @@ define i64 @test6(ptr %array, i64 %i, i64 %j) {
; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds i64, ptr [[ARRAY:%.*]], i64 [[J:%.*]]
; CHECK-NEXT: store i64 [[ADD]], ptr [[GEP]], align 8
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i64, ptr [[ARRAY]], i64 [[I]]
-; CHECK-NEXT: [[GEP52:%.*]] = getelementptr inbounds i64, ptr [[TMP0]], i64 6
+; CHECK-NEXT: [[GEP52:%.*]] = getelementptr inbounds i8, ptr [[TMP0]], i64 48
; CHECK-NEXT: store i64 [[I]], ptr [[GEP52]], align 8
; CHECK-NEXT: store i64 [[I]], ptr [[TMP0]], align 8
; CHECK-NEXT: ret i64 undef
@@ -196,15 +196,15 @@ define i32 @test7(ptr %array, i32 %i, i32 %j, i32 %k) {
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[I:%.*]], 5
; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[I]] to i64
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i32, ptr [[ARRAY:%.*]], i64 [[TMP0]]
-; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 5
+; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i64 20
; CHECK-NEXT: store i32 [[ADD]], ptr [[GEP2]], align 4
; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[K:%.*]] to i64
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i32, ptr [[ARRAY]], i64 [[TMP2]]
-; CHECK-NEXT: [[GEP54:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 6
+; CHECK-NEXT: [[GEP54:%.*]] = getelementptr inbounds i8, ptr [[TMP3]], i64 24
; CHECK-NEXT: store i32 [[I]], ptr [[GEP54]], align 4
; CHECK-NEXT: [[TMP4:%.*]] = sext i32 [[J:%.*]] to i64
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i32, ptr [[ARRAY]], i64 [[TMP4]]
-; CHECK-NEXT: [[GEP86:%.*]] = getelementptr inbounds i32, ptr [[TMP5]], i64 35
+; CHECK-NEXT: [[GEP86:%.*]] = getelementptr inbounds i8, ptr [[TMP5]], i64 140
; CHECK-NEXT: store i32 [[I]], ptr [[GEP86]], align 4
; CHECK-NEXT: ret i32 undef
;
@@ -231,13 +231,13 @@ define i32 @test8(ptr %array, ptr %array2, ptr %array3, i32 %i) {
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[I:%.*]], 5
; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[I]] to i64
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i32, ptr [[ARRAY:%.*]], i64 [[TMP0]]
-; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 5
+; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i64 20
; CHECK-NEXT: store i32 [[ADD]], ptr [[GEP2]], align 4
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i32, ptr [[ARRAY2:%.*]], i64 [[TMP0]]
-; CHECK-NEXT: [[GEP54:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 6
+; CHECK-NEXT: [[GEP54:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i64 24
; CHECK-NEXT: store i32 [[I]], ptr [[GEP54]], align 4
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i32, ptr [[ARRAY3:%.*]], i64 [[TMP0]]
-; CHECK-NEXT: [[GEP86:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i64 35
+; CHECK-NEXT: [[GEP86:%.*]] = getelementptr inbounds i8, ptr [[TMP3]], i64 140
; CHECK-NEXT: store i32 [[I]], ptr [[GEP86]], align 4
; CHECK-NEXT: ret i32 undef
;
@@ -264,12 +264,12 @@ define i32 @test9(ptr %array, i32 %i) {
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[I:%.*]], 5
; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[I]] to i64
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr [50 x i32], ptr [[ARRAY:%.*]], i64 0, i64 [[TMP0]]
-; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 5
+; CHECK-NEXT: [[GEP2:%.*]] = getelementptr inbounds i8, ptr [[TMP1]], i64 20
; CHECK-NEXT: store i32 [[ADD]], ptr [[GEP2]], align 4
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr [50 x i32], ptr [[ARRAY]], i64 [[TMP0]], i64 [[TMP0]]
-; CHECK-NEXT: [[GEP54:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 6
+; CHECK-NEXT: [[GEP54:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i64 24
; CHECK-NEXT: store i32 [[I]], ptr [[GEP54]], align 4
-; CHECK-NEXT: [[GEP87:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 335
+; CHECK-NEXT: [[GEP87:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i64 1340
; CHECK-NEXT: store i32 [[I]], ptr [[GEP87]], align 4
; CHECK-NEXT: ret i32 undef
;
diff --git a/llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/reassociate-geps-and-slsr-addrspace.ll b/llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/reassociate-geps-and-slsr-addrspace.ll
index 9cf725840abdc3..0af4093c184ebb 100644
--- a/llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/reassociate-geps-and-slsr-addrspace.ll
+++ b/llvm/test/Transforms/StraightLineStrengthReduce/AMDGPU/reassociate-geps-and-slsr-addrspace.ll
@@ -10,12 +10,12 @@ define amdgpu_kernel void @slsr_after_reassociate_global_geps_mubuf_max_offset(p
; CHECK-NEXT: bb:
; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[I]] to i64
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr float, ptr addrspace(1) [[ARR]], i64 [[TMP0]]
-; CHECK-NEXT: [[P12:%.*]] = getelementptr inbounds float, ptr addrspace(1) [[TMP1]], i64 1023
+; CHECK-NEXT: [[P12:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP1]], i64 4092
; CHECK-NEXT: [[V11:%.*]] = load i32, ptr addrspace(1) [[P12]], align 4
; CHECK-NEXT: store i32 [[V11]], ptr addrspace(1) [[OUT]], align 4
; CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[TMP0]], 2
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr addrspace(1) [[TMP1]], i64 [[TMP2]]
-; CHECK-NEXT: [[P24:%.*]] = getelementptr inbounds float, ptr addrspace(1) [[TMP3]], i64 1023
+; CHECK-NEXT: [[P24:%.*]] = getelementptr inbounds i8, ptr addrspace(1) [[TMP3]], i64 4092
; CHECK-NEXT: [[V22:%.*]] = load i32, ptr addrspace(1) [[P24]], align 4
; CHECK-NEXT: store i32 [[V22]], ptr addrspace(1) [[OUT]], align 4
; CHECK-NEXT: ret void
@@ -76,12 +76,12 @@ define amdgpu_kernel void @slsr_after_reassociate_lds_geps_ds_max_offset(ptr add
; CHECK-SAME: ptr addrspace(1) [[OUT:%.*]], ptr addrspace(3) noalias [[ARR:%.*]], i32 [[I:%.*]]) {
; CHECK-NEXT: bb:
; CHECK-NEXT: [[TMP0:%.*]] = getelementptr float, ptr addrspace(3) [[ARR]], i32 [[I]]
-; CHECK-NEXT: [[P12:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[TMP0]], i32 16383
+; CHECK-NEXT: [[P12:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP0]], i32 65532
; CHECK-NEXT: [[V11:%.*]] = load i32, ptr addrspace(3) [[P12]], align 4
; CHECK-NEXT: store i32 [[V11]], ptr addrspace(1) [[OUT]], align 4
; CHECK-NEXT: [[TMP1:%.*]] = shl i32 [[I]], 2
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr addrspace(3) [[TMP0]], i32 [[TMP1]]
-; CHECK-NEXT: [[P24:%.*]] = getelementptr inbounds float, ptr addrspace(3) [[TMP2]], i32 16383
+; CHECK-NEXT: [[P24:%.*]] = getelementptr inbounds i8, ptr addrspace(3) [[TMP2]], i32 65532
; CHECK-NEXT: [[V22:%.*]] = load i32, ptr addrspace(3) [[P24]], align 4
; CHECK-NEXT: store i32 [[V22]], ptr addrspace(1) [[OUT]], align 4
; CHECK-NEXT: ret void
diff --git a/llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll b/llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll
index e65b9b1a99a6d8..916f3b32887b98 100644
--- a/llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll
+++ b/llvm/test/Transforms/StraightLineStrengthReduce/NVPTX/reassociate-geps-and-slsr.ll
@@ -32,20 +32,20 @@ define void @slsr_after_reassociate_geps(ptr %arr, i32 %i) {
; CHECK-SAME: ptr [[ARR:%.*]], i32 [[I:%.*]]) {
; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[I]] to i64
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr float, ptr [[ARR]], i64 [[TMP1]]
-; CHECK-NEXT: [[P12:%.*]] = getelementptr inbounds float, ptr [[TMP2]], i64 5
+; CHECK-NEXT: [[P12:%.*]] = getelementptr inbounds i8, ptr [[TMP2]], i64 20
; CHECK-NEXT: [[V1:%.*]] = load float, ptr [[P12]], align 4
; CHECK-NEXT: call void @foo(float [[V1]])
; CHECK-NEXT: [[TMP3:%.*]] = shl i64 [[TMP1]], 2
; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP2]], i64 [[TMP3]]
-; CHECK-NEXT: [[P24:%.*]] = getelementptr inbounds float, ptr [[TMP4]], i64 5
+; CHECK-NEXT: [[P24:%.*]] = getelementptr inbounds i8, ptr [[TMP4]], i64 20
; CHECK-NEXT: [[V2:%.*]] = load float, ptr [[P24]], align 4
; CHECK-NEXT: call void @foo(float [[V2]])
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP4]], i64 [[TMP3]]
-; CHECK-NEXT: [[P36:%.*]] = getelementptr inbounds float, ptr [[TMP5]], i64 5
+; CHECK-NEXT: [[P36:%.*]] = getelementptr inbounds i8, ptr [[TMP5]], i64 20
; CHECK-NEXT: [[V3:%.*]] = load float, ptr [[P36]], align 4
; CHECK-NEXT: call void @foo(float [[V3]])
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[TMP5]], i64 [[TMP3]]
-; CHECK-NEXT: [[P48:%.*]] = getelementptr inbounds float, ptr [[TMP6]], i64 5
+; CHECK-NEXT: [[P48:%.*]] = getelementptr inbounds i8, ptr [[TMP6]], i64 20
; CHECK-NEXT: [[V4:%.*]] = load float, ptr [[P48]], align 4
; CHECK-NEXT: call void @foo(float [[V4]])
; CHECK-NEXT: ret void
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