[llvm] [MacroFusion][RISCV] Allocate same register for second instruction of fusible pair (PR #77461)

[Wang Pengcheng via llvm-commits]

================
@@ -823,6 +823,8 @@ bool RISCVRegisterInfo::getRegAllocationHints(
         tryAddHint(MO, MI.getOperand(0), NeedGPRC);
       }
     }
+    if (MI.isFusible() && OpIdx == 1)
----------------
wangpc-pp wrote:

I think we don't need to, because this has been done in MacroFusion mutation?

https://github.com/llvm/llvm-project/pull/77461