[llvm] [MacroFusion][RISCV] Allocate same register for second instruction of fusible pair (PR #77461)

[Mikhail Gudim via llvm-commits]

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@@ -823,6 +823,8 @@ bool RISCVRegisterInfo::getRegAllocationHints(
         tryAddHint(MO, MI.getOperand(0), NeedGPRC);
       }
     }
+    if (MI.isFusible() && OpIdx == 1)
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mgudim wrote:

don't we need to check that the "first" instuction is part of a fusible pair?

https://github.com/llvm/llvm-project/pull/77461