[llvm] [LangRef] adjust IR atomics specification following C++20 model tweaks. (PR #77263)

[Joshua Cranmer via llvm-commits]

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@@ -3413,33 +3412,38 @@ For a simpler introduction to the ordering constraints, see the
     stronger) operations on the same address. If an address is written
     ``monotonic``-ally by one thread, and other threads ``monotonic``-ally
     read that address repeatedly, the other threads must eventually see
-    the write. This corresponds to the C++0x/C1x
-    ``memory_order_relaxed``.
+    the write. This corresponds to the C++/C ``memory_order_relaxed``.
 ``acquire``
     In addition to the guarantees of ``monotonic``, a
     *synchronizes-with* edge may be formed with a ``release`` operation.
     This is intended to model C++'s ``memory_order_acquire``.
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jcranmer-intel wrote:

Nit: here's a bare C++ that could do with C/C++ :-)

https://github.com/llvm/llvm-project/pull/77263