[llvm] [AsmPrinter][DebugNames] Implement DW_IDX_parent entries (PR #77457)
Felipe de Azevedo Piovezan via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 9 04:42:11 PST 2024
https://github.com/felipepiovezan updated https://github.com/llvm/llvm-project/pull/77457
>From 7eaa64065a539a232e0dfdc4954fe774c18607df Mon Sep 17 00:00:00 2001
From: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: Wed, 6 Dec 2023 11:26:18 -0800
Subject: [PATCH] [AsmPrinter][DebugNames] Implement DW_IDX_parent entries
This implements the ideas discussed in [1].
To summarize, this commit changes AsmPrinter so that it outputs DW_IDX_parent
information for debug_name entries. It will enable debuggers to speed up queries
for fully qualified types (based on a DWARFDeclContext) significantly, as
debuggers will no longer need to parse the entire CU in order to inspect the
parent chain of a DIE. Instead, a debugger can simply take the parent DIE offset
from the accelerator table and peek at its name in the debug_info/debug_str
sections.
The implementation uses two types of DW_FORM for the DW_IDX_parent attribute:
1. DW_FORM_ref4, which points to the accelerator table entry for the parent.
2. DW_FORM_flag_present, when the entry has a parent that is not in the table
(that is, the parent doesn't have a name, or isn't allowed to be in the table as
per the DWARF spec). This is space-efficient, since it takes 0 bytes.
When all patches related to this are merged, we are able to show that evaluating
an expression such as:
```
lldb --batch -o 'b CodeGenFunction::GenerateCode' -o run -o 'expr Fn' -- \
clang++ -c -g test.cpp -o /dev/null
```
is far faster: from ~5000 ms to ~1500ms.
Building llvm-project + clang with and without this patch, and looking at its
impact on object file size:
```
ls -la $(find build_stage2_Debug_idx_parent_assert_dwarf5 -name \*.cpp.o) | awk '{s+=$5} END {printf "%\047d\n", s}'
11,507,327,592
-la $(find build_stage2_Debug_no_idx_parent_assert_dwarf5 -name \*.cpp.o) | awk '{s+=$5} END {printf "%\047d\n", s}'
11,436,446,616
```
That is, an increase of 0.62% in total object file size.
Looking only at debug_names:
```
$stage1_build/bin/llvm-objdump --section-headers $(find build_stage2_Debug_idx_parent_assert_dwarf5 -name \*.cpp.o) | grep __debug_names | awk '{s+="0x"$3} END {printf "%\047d\n", s}'
440,772,348
$stage1_build/bin/llvm-objdump --section-headers $(find build_stage2_Debug_no_idx_parent_assert_dwarf5 -name \*.cpp.o) | grep __debug_names | awk '{s+="0x"$3} END {printf "%\047d\n", s}'
369,867,920
```
That is an increase of 19%.
DWARF Linkers need to be changed in order to support this. This commit already
brings support to "base" linker, but it does not attempt to modify the parallel
linker. Accelerator entries refer to the corresponding DIE offset, and this
patch also requires the parent DIE offset -- it's not clear how the parallel
linker can access this. It may be obvious to someone familiar with it, but it
would be nice to get help from its authors.
[1]: https://discourse.llvm.org/t/rfc-improve-dwarf-5-debug-names-type-lookup-parsing-speed/74151/
---
llvm/include/llvm/CodeGen/AccelTable.h | 23 +++-
llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp | 118 +++++++++++++++---
llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp | 8 ++
.../DWARFLinker/Parallel/DWARFLinkerImpl.cpp | 3 +-
llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp | 16 ++-
.../test/DebugInfo/X86/debug-names-dwarf64.ll | 16 ++-
.../DebugInfo/X86/debug-names-end-of-list.ll | 6 +-
llvm/test/DebugInfo/X86/debug-names-types.ll | 58 ++++++---
.../ARM/accel-imported-declarations.test | 2 +
.../ARM/dwarf5-dwarf4-combination-macho.test | 12 +-
10 files changed, 212 insertions(+), 50 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/AccelTable.h b/llvm/include/llvm/CodeGen/AccelTable.h
index 0638fbffda4f31..12ed123ee90a02 100644
--- a/llvm/include/llvm/CodeGen/AccelTable.h
+++ b/llvm/include/llvm/CodeGen/AccelTable.h
@@ -270,9 +270,12 @@ class DWARF5AccelTableData : public AccelTableData {
DWARF5AccelTableData(const DIE &Die, const uint32_t UnitID,
const bool IsTU = false);
- DWARF5AccelTableData(const uint64_t DieOffset, const unsigned DieTag,
- const unsigned UnitID, const bool IsTU = false)
- : OffsetVal(DieOffset), DieTag(DieTag), UnitID(UnitID), IsTU(IsTU) {}
+ DWARF5AccelTableData(const uint64_t DieOffset,
+ const std::optional<uint64_t> ParentOffset,
+ const unsigned DieTag, const unsigned UnitID,
+ const bool IsTU = false)
+ : OffsetVal(DieOffset), ParentOffset(ParentOffset), DieTag(DieTag),
+ UnitID(UnitID), IsTU(IsTU) {}
#ifndef NDEBUG
void print(raw_ostream &OS) const override;
@@ -287,14 +290,23 @@ class DWARF5AccelTableData : public AccelTableData {
bool isTU() const { return IsTU; }
void normalizeDIEToOffset() {
assert(!isNormalized() && "Accessing offset after normalizing.");
- OffsetVal = std::get<const DIE *>(OffsetVal)->getOffset();
+ const DIE *Entry = std::get<const DIE *>(OffsetVal);
+ ParentOffset = Entry->getParent() ? Entry->getParent()->getOffset()
+ : std::optional<uint64_t>();
+ OffsetVal = Entry->getOffset();
}
bool isNormalized() const {
return std::holds_alternative<uint64_t>(OffsetVal);
}
+ std::optional<uint64_t> getParentDieOffset() const {
+ assert(isNormalized() && "Accessing DIE Offset before normalizing.");
+ return ParentOffset;
+ }
+
protected:
std::variant<const DIE *, uint64_t> OffsetVal;
+ std::optional<uint64_t> ParentOffset;
uint32_t DieTag : 16;
uint32_t UnitID : 15;
uint32_t IsTU : 1;
@@ -341,7 +353,8 @@ class DWARF5AccelTable : public AccelTable<DWARF5AccelTableData> {
void addTypeEntries(DWARF5AccelTable &Table) {
for (auto &Entry : Table.getEntries()) {
for (auto *Data : Entry.second.getValues<DWARF5AccelTableData *>()) {
- addName(Entry.second.Name, Data->getDieOffset(), Data->getDieTag(),
+ addName(Entry.second.Name, Data->getDieOffset(),
+ Data->getParentDieOffset(), Data->getDieTag(),
Data->getUnitID(), true);
}
}
diff --git a/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp b/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp
index b72c17aa6f54a3..36ffa872c024e8 100644
--- a/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp
+++ b/llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp
@@ -13,6 +13,7 @@
#include "llvm/CodeGen/AccelTable.h"
#include "DwarfCompileUnit.h"
#include "DwarfUnit.h"
+#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/Twine.h"
#include "llvm/BinaryFormat/Dwarf.h"
@@ -207,7 +208,7 @@ class Dwarf5AccelTableWriter : public AccelTableWriter {
};
Header Header;
- DenseMap<uint32_t, SmallVector<DWARF5AccelTableData::AttributeEncoding, 2>>
+ DenseMap<uint32_t, SmallVector<DWARF5AccelTableData::AttributeEncoding, 3>>
Abbreviations;
ArrayRef<std::variant<MCSymbol *, uint64_t>> CompUnits;
ArrayRef<std::variant<MCSymbol *, uint64_t>> TypeUnits;
@@ -220,6 +221,8 @@ class Dwarf5AccelTableWriter : public AccelTableWriter {
MCSymbol *EntryPool = Asm->createTempSymbol("names_entries");
// Indicates if this module is built with Split Dwarf enabled.
bool IsSplitDwarf = false;
+ // Stores the DIE offsets which are indexed by this table.
+ DenseSet<uint64_t> IndexedOffsets;
void populateAbbrevsMap();
@@ -228,8 +231,11 @@ class Dwarf5AccelTableWriter : public AccelTableWriter {
void emitBuckets() const;
void emitStringOffsets() const;
void emitAbbrevs() const;
- void emitEntry(const DWARF5AccelTableData &Entry) const;
- void emitData() const;
+ void
+ emitEntry(const DWARF5AccelTableData &Entry,
+ const DenseMap<uint64_t, MCSymbol *> &DIEOffsetToAccelEntryLabel,
+ DenseSet<MCSymbol *> &EmittedAccelEntrySymbols) const;
+ void emitData();
public:
Dwarf5AccelTableWriter(
@@ -395,23 +401,65 @@ void Dwarf5AccelTableWriter::Header::emit(Dwarf5AccelTableWriter &Ctx) {
Asm->OutStreamer->emitBytes({AugmentationString, AugmentationStringSize});
}
-static uint32_t constexpr LowerBitSize = dwarf::DW_IDX_type_hash;
+enum IdxParentEncoding : uint8_t {
+ NoIndexedParent = 0, // Parent information present but parent isn't indexed.
+ Ref4 = 1, // Parent information present and parent is indexed.
+ NoParent = 2, // Parent information missing.
+};
+
+static uint32_t constexpr NumBitsIdxParent = 2;
+
+uint8_t encodeIdxParent(std::optional<dwarf::Form> MaybeParentForm) {
+ if (!MaybeParentForm)
+ return NoParent;
+ switch (*MaybeParentForm) {
+ case dwarf::Form::DW_FORM_flag_present:
+ return NoIndexedParent;
+ case dwarf::Form::DW_FORM_ref4:
+ return Ref4;
+ default:
+ break;
+ }
+ // This is not crashing on bad input: we should only reach this if the
+ // internal compiler logic is faulty; see getFormForIdxParent.
+ llvm_unreachable("Bad form for IDX_parent");
+}
+
+static uint32_t constexpr ParentBitOffset = dwarf::DW_IDX_type_hash;
+static uint32_t constexpr TagBitOffset = ParentBitOffset + NumBitsIdxParent;
static uint32_t getTagFromAbbreviationTag(const uint32_t AbbrvTag) {
- return AbbrvTag >> LowerBitSize;
+ return AbbrvTag >> TagBitOffset;
}
/// Constructs a unique AbbrevTag that captures what a DIE accesses.
/// Using this tag we can emit a unique abbreviation for each DIE.
static uint32_t constructAbbreviationTag(
const unsigned Tag,
- const std::optional<DWARF5AccelTable::UnitIndexAndEncoding> &EntryRet) {
+ const std::optional<DWARF5AccelTable::UnitIndexAndEncoding> &EntryRet,
+ std::optional<dwarf::Form> MaybeParentForm) {
uint32_t AbbrvTag = 0;
if (EntryRet)
AbbrvTag |= 1 << EntryRet->Encoding.Index;
AbbrvTag |= 1 << dwarf::DW_IDX_die_offset;
- AbbrvTag |= Tag << LowerBitSize;
+ AbbrvTag |= 1 << dwarf::DW_IDX_parent;
+ AbbrvTag |= encodeIdxParent(MaybeParentForm) << ParentBitOffset;
+ AbbrvTag |= Tag << TagBitOffset;
return AbbrvTag;
}
+
+static std::optional<dwarf::Form>
+getFormForIdxParent(const DenseSet<uint64_t> &IndexedOffsets,
+ std::optional<uint64_t> ParentOffset) {
+ // No parent information
+ if (!ParentOffset)
+ return std::nullopt;
+ // Parent is indexed by this table.
+ if (IndexedOffsets.contains(*ParentOffset))
+ return dwarf::Form::DW_FORM_ref4;
+ // Parent is not indexed by this table.
+ return dwarf::Form::DW_FORM_flag_present;
+}
+
void Dwarf5AccelTableWriter::populateAbbrevsMap() {
for (auto &Bucket : Contents.getBuckets()) {
for (auto *Hash : Bucket) {
@@ -419,12 +467,17 @@ void Dwarf5AccelTableWriter::populateAbbrevsMap() {
std::optional<DWARF5AccelTable::UnitIndexAndEncoding> EntryRet =
getIndexForEntry(*Value);
unsigned Tag = Value->getDieTag();
- uint32_t AbbrvTag = constructAbbreviationTag(Tag, EntryRet);
+ std::optional<dwarf::Form> MaybeParentForm =
+ getFormForIdxParent(IndexedOffsets, Value->getParentDieOffset());
+ uint32_t AbbrvTag =
+ constructAbbreviationTag(Tag, EntryRet, MaybeParentForm);
if (Abbreviations.count(AbbrvTag) == 0) {
- SmallVector<DWARF5AccelTableData::AttributeEncoding, 2> UA;
+ SmallVector<DWARF5AccelTableData::AttributeEncoding, 3> UA;
if (EntryRet)
UA.push_back(EntryRet->Encoding);
UA.push_back({dwarf::DW_IDX_die_offset, dwarf::DW_FORM_ref4});
+ if (MaybeParentForm)
+ UA.push_back({dwarf::DW_IDX_parent, *MaybeParentForm});
Abbreviations.try_emplace(AbbrvTag, UA);
}
}
@@ -496,15 +549,32 @@ void Dwarf5AccelTableWriter::emitAbbrevs() const {
}
void Dwarf5AccelTableWriter::emitEntry(
- const DWARF5AccelTableData &Entry) const {
+ const DWARF5AccelTableData &Entry,
+ const DenseMap<uint64_t, MCSymbol *> &DIEOffsetToAccelEntryLabel,
+ DenseSet<MCSymbol *> &EmittedAccelEntrySymbols) const {
std::optional<DWARF5AccelTable::UnitIndexAndEncoding> EntryRet =
getIndexForEntry(Entry);
- uint32_t AbbrvTag = constructAbbreviationTag(Entry.getDieTag(), EntryRet);
+ std::optional<uint64_t> MaybeParentOffset = Entry.getParentDieOffset();
+ std::optional<dwarf::Form> MaybeParentForm =
+ getFormForIdxParent(IndexedOffsets, MaybeParentOffset);
+ uint32_t AbbrvTag =
+ constructAbbreviationTag(Entry.getDieTag(), EntryRet, MaybeParentForm);
auto AbbrevIt = Abbreviations.find(AbbrvTag);
assert(AbbrevIt != Abbreviations.end() &&
"Why wasn't this abbrev generated?");
assert(getTagFromAbbreviationTag(AbbrevIt->first) == Entry.getDieTag() &&
"Invalid Tag");
+
+ auto EntrySymbolIt = DIEOffsetToAccelEntryLabel.find(Entry.getDieOffset());
+ assert(EntrySymbolIt != DIEOffsetToAccelEntryLabel.end());
+ MCSymbol *EntrySymbol = EntrySymbolIt->getSecond();
+
+ // Emit the label for this Entry, so that IDX_parents may refer to it.
+ // Note: a DIE may have multiple accelerator Entries; this check avoids
+ // creating/emitting multiple labels for the same DIE.
+ if (EmittedAccelEntrySymbols.insert(EntrySymbol).second)
+ Asm->OutStreamer->emitLabel(EntrySymbol);
+
Asm->emitULEB128(AbbrevIt->first, "Abbreviation code");
for (const auto &AttrEnc : AbbrevIt->second) {
@@ -520,20 +590,34 @@ void Dwarf5AccelTableWriter::emitEntry(
assert(AttrEnc.Form == dwarf::DW_FORM_ref4);
Asm->emitInt32(Entry.getDieOffset());
break;
+ case dwarf::DW_IDX_parent: {
+ if (AttrEnc.Form == dwarf::Form::DW_FORM_flag_present)
+ break;
+ auto ParentSymbolIt = DIEOffsetToAccelEntryLabel.find(*MaybeParentOffset);
+ assert(ParentSymbolIt != DIEOffsetToAccelEntryLabel.end());
+ Asm->emitLabelDifference(ParentSymbolIt->getSecond(), EntryPool, 4);
+ break;
+ }
default:
llvm_unreachable("Unexpected index attribute!");
}
}
}
-void Dwarf5AccelTableWriter::emitData() const {
+void Dwarf5AccelTableWriter::emitData() {
+ DenseMap<uint64_t, MCSymbol*> DIEOffsetToAccelEntryLabel;
+
+ for (auto Offset : IndexedOffsets)
+ DIEOffsetToAccelEntryLabel[Offset] = Asm->createTempSymbol("symbol");
+
Asm->OutStreamer->emitLabel(EntryPool);
+ DenseSet<MCSymbol *> EmittedAccelEntrySymbols;
for (auto &Bucket : Contents.getBuckets()) {
for (auto *Hash : Bucket) {
// Remember to emit the label for our offset.
Asm->OutStreamer->emitLabel(Hash->Sym);
- for (const auto *Value : Hash->Values)
- emitEntry(*static_cast<const DWARF5AccelTableData *>(Value));
+ for (const auto *Value : Hash->getValues<DWARF5AccelTableData*>())
+ emitEntry(*Value, DIEOffsetToAccelEntryLabel, EmittedAccelEntrySymbols);
Asm->OutStreamer->AddComment("End of list: " + Hash->Name.getString());
Asm->emitInt8(0);
}
@@ -555,6 +639,12 @@ Dwarf5AccelTableWriter::Dwarf5AccelTableWriter(
CompUnits(CompUnits), TypeUnits(TypeUnits),
getIndexForEntry(std::move(getIndexForEntry)),
IsSplitDwarf(IsSplitDwarf) {
+
+ for (auto &Bucket : Contents.getBuckets())
+ for (auto *Hash : Bucket)
+ for (auto *Value : Hash->getValues<DWARF5AccelTableData *>())
+ IndexedOffsets.insert(Value->getDieOffset());
+
populateAbbrevsMap();
}
diff --git a/llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp b/llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
index 8d76c3bcf672e7..66d9b0ae9841fe 100644
--- a/llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
+++ b/llvm/lib/DWARFLinker/Classic/DWARFLinker.cpp
@@ -2252,14 +2252,22 @@ void DWARFLinker::emitAcceleratorEntriesForUnit(CompileUnit &Unit) {
TheDwarfEmitter->emitPubTypesForUnit(Unit);
} break;
case AccelTableKind::DebugNames: {
+ auto ParentOffsetOrNull = [](const DIE *Die) -> std::optional<uint64_t> {
+ if (const DIE *Parent = Die->getParent())
+ return Die->getParent()->getOffset();
+ return std::nullopt;
+ };
for (const auto &Namespace : Unit.getNamespaces())
DebugNames.addName(Namespace.Name, Namespace.Die->getOffset(),
+ ParentOffsetOrNull(Namespace.Die),
Namespace.Die->getTag(), Unit.getUniqueID());
for (const auto &Pubname : Unit.getPubnames())
DebugNames.addName(Pubname.Name, Pubname.Die->getOffset(),
+ ParentOffsetOrNull(Pubname.Die),
Pubname.Die->getTag(), Unit.getUniqueID());
for (const auto &Pubtype : Unit.getPubtypes())
DebugNames.addName(Pubtype.Name, Pubtype.Die->getOffset(),
+ ParentOffsetOrNull(Pubtype.Die),
Pubtype.Die->getTag(), Unit.getUniqueID());
} break;
}
diff --git a/llvm/lib/DWARFLinker/Parallel/DWARFLinkerImpl.cpp b/llvm/lib/DWARFLinker/Parallel/DWARFLinkerImpl.cpp
index bb59cbfdb3477a..790229e213b2bd 100644
--- a/llvm/lib/DWARFLinker/Parallel/DWARFLinkerImpl.cpp
+++ b/llvm/lib/DWARFLinker/Parallel/DWARFLinkerImpl.cpp
@@ -1374,7 +1374,8 @@ void DWARFLinkerImpl::emitDWARFv5DebugNamesSection(const Triple &TargetTriple) {
case DwarfUnit::AccelType::Namespace:
case DwarfUnit::AccelType::Type: {
DebugNames->addName(*DebugStrStrings.getExistingEntry(Info.String),
- Info.OutOffset, Info.Tag, CU->getUniqueID());
+ Info.OutOffset, std::nullopt /*ParentDIEOffset*/,
+ Info.Tag, CU->getUniqueID());
} break;
default:
diff --git a/llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp b/llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
index d25b732fdba3f0..c4c14f5e2c9d36 100644
--- a/llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
+++ b/llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
@@ -7,6 +7,7 @@
//===----------------------------------------------------------------------===//
#include "llvm/DebugInfo/DWARF/DWARFVerifier.h"
#include "llvm/ADT/IntervalMap.h"
+#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallSet.h"
#include "llvm/BinaryFormat/Dwarf.h"
#include "llvm/DebugInfo/DWARF/DWARFAbbreviationDeclaration.h"
@@ -1272,6 +1273,20 @@ unsigned DWARFVerifier::verifyNameIndexAttribute(
NI.getUnitOffset(), Abbr.Code, AttrEnc.Form, dwarf::DW_FORM_data8);
return 1;
}
+ return 0;
+ }
+
+ if (AttrEnc.Index == dwarf::DW_IDX_parent) {
+ constexpr static auto AllowedForms = {dwarf::Form::DW_FORM_flag_present,
+ dwarf::Form::DW_FORM_ref4};
+ if (!is_contained(AllowedForms, AttrEnc.Form)) {
+ error() << formatv("NameIndex @ {0:x}: Abbreviation {1:x}: DW_IDX_parent "
+ "uses an unexpected form {2} (should be "
+ "DW_FORM_ref4 or DW_FORM_flag_present).\n",
+ NI.getUnitOffset(), Abbr.Code, AttrEnc.Form);
+ return 1;
+ }
+ return 0;
}
// A list of known index attributes and their expected form classes.
@@ -1286,7 +1301,6 @@ unsigned DWARFVerifier::verifyNameIndexAttribute(
{dwarf::DW_IDX_compile_unit, DWARFFormValue::FC_Constant, {"constant"}},
{dwarf::DW_IDX_type_unit, DWARFFormValue::FC_Constant, {"constant"}},
{dwarf::DW_IDX_die_offset, DWARFFormValue::FC_Reference, {"reference"}},
- {dwarf::DW_IDX_parent, DWARFFormValue::FC_Constant, {"constant"}},
};
ArrayRef<FormClassTable> TableRef(Table);
diff --git a/llvm/test/DebugInfo/X86/debug-names-dwarf64.ll b/llvm/test/DebugInfo/X86/debug-names-dwarf64.ll
index b94bdbcb12010c..a6855d77a34ac2 100644
--- a/llvm/test/DebugInfo/X86/debug-names-dwarf64.ll
+++ b/llvm/test/DebugInfo/X86/debug-names-dwarf64.ll
@@ -30,21 +30,25 @@
; CHECK-NEXT: CU[0]: 0x00000000
; CHECK-NEXT: ]
; CHECK-NEXT: Abbreviations [
+; CHECK-NEXT: Abbreviation [[ABBREV_LABEL:0x[0-9a-f]*]] {
+; CHECK-NEXT: Tag: DW_TAG_label
+; CHECK-NEXT: DW_IDX_die_offset: DW_FORM_ref4
+; CHECK-NEXT: DW_IDX_parent: DW_FORM_ref4
+; CHECK-NEXT: }
; CHECK-NEXT: Abbreviation [[ABBREV:0x[0-9a-f]*]] {
; CHECK-NEXT: Tag: DW_TAG_base_type
; CHECK-NEXT: DW_IDX_die_offset: DW_FORM_ref4
+; CHECK-NEXT: DW_IDX_parent: DW_FORM_flag_present
; CHECK-NEXT: }
; CHECK-NEXT: Abbreviation [[ABBREV1:0x[0-9a-f]*]] {
; CHECK-NEXT: Tag: DW_TAG_variable
; CHECK-NEXT: DW_IDX_die_offset: DW_FORM_ref4
+; CHECK-NEXT: DW_IDX_parent: DW_FORM_flag_present
; CHECK-NEXT: }
; CHECK-NEXT: Abbreviation [[ABBREV_SP:0x[0-9a-f]*]] {
; CHECK-NEXT: Tag: DW_TAG_subprogram
; CHECK-NEXT: DW_IDX_die_offset: DW_FORM_ref4
-; CHECK-NEXT: }
-; CHECK-NEXT: Abbreviation [[ABBREV_LABEL:0x[0-9a-f]*]] {
-; CHECK-NEXT: Tag: DW_TAG_label
-; CHECK-NEXT: DW_IDX_die_offset: DW_FORM_ref4
+; CHECK-NEXT: DW_IDX_parent: DW_FORM_flag_present
; CHECK-NEXT: }
; CHECK-NEXT: ]
; CHECK-NEXT: Bucket 0 [
@@ -55,6 +59,7 @@
; CHECK-NEXT: Abbrev: [[ABBREV]]
; CHECK-NEXT: Tag: DW_TAG_base_type
; CHECK-NEXT: DW_IDX_die_offset: [[TYPEDIE]]
+; CHECK-NEXT: DW_IDX_parent: true
; CHECK-NEXT: }
; CHECK-NEXT: }
; CHECK-NEXT: ]
@@ -66,6 +71,7 @@
; CHECK-NEXT: Abbrev: [[ABBREV1]]
; CHECK-NEXT: Tag: DW_TAG_variable
; CHECK-NEXT: DW_IDX_die_offset: [[VARDIE]]
+; CHECK-NEXT: DW_IDX_parent: true
; CHECK-NEXT: }
; CHECK-NEXT: }
; CHECK-NEXT: Name 3 {
@@ -75,6 +81,7 @@
; CHECK-NEXT: Abbrev: [[ABBREV_SP]]
; CHECK-NEXT: Tag: DW_TAG_subprogram
; CHECK-NEXT: DW_IDX_die_offset: [[SPDIE]]
+; CHECK-NEXT: DW_IDX_parent: true
; CHECK-NEXT: }
; CHECK-NEXT: }
; CHECK-NEXT: ]
@@ -89,6 +96,7 @@
; CHECK-NEXT: Abbrev: [[ABBREV_LABEL]]
; CHECK-NEXT: Tag: DW_TAG_label
; CHECK-NEXT: DW_IDX_die_offset: [[LABELDIE]]
+; CHECK-NEXT: DW_IDX_parent: 0x{{.*}}
; CHECK-NEXT: }
; CHECK-NEXT: }
; CHECK-NEXT: ]
diff --git a/llvm/test/DebugInfo/X86/debug-names-end-of-list.ll b/llvm/test/DebugInfo/X86/debug-names-end-of-list.ll
index f57168a8eff386..b8d4046201c342 100644
--- a/llvm/test/DebugInfo/X86/debug-names-end-of-list.ll
+++ b/llvm/test/DebugInfo/X86/debug-names-end-of-list.ll
@@ -6,8 +6,10 @@
; CHECK: .section .debug_names,"", at progbits
; CHECK: .Lnames_entries0:
-; CHECK: .byte 0 # End of list: int
-; CHECK: .byte 0 # End of list: foo
+; CHECK: .byte 0
+; CHECK-NEXT: # End of list: int
+; CHECK: .byte 0
+; CHECK-NEXT: # End of list: foo
@foo = common dso_local global i32 0, align 4, !dbg !5
diff --git a/llvm/test/DebugInfo/X86/debug-names-types.ll b/llvm/test/DebugInfo/X86/debug-names-types.ll
index 501b7efd88eb9a..c44e82578f14a4 100644
--- a/llvm/test/DebugInfo/X86/debug-names-types.ll
+++ b/llvm/test/DebugInfo/X86/debug-names-types.ll
@@ -37,27 +37,32 @@
; CHECK-NEXT: LocalTU[0]: 0x00000000
; CHECK-NEXT: ]
; CHECK: Abbreviations [
-; CHECK-NEXT: Abbreviation [[ABBREV1:0x[0-9a-f]*]] {
+; CHECK-NEXT: Abbreviation [[ABBREV3:0x[0-9a-f]*]] {
; CHECK-NEXT: Tag: DW_TAG_structure_type
+; CHECK-NEXT: DW_IDX_type_unit: DW_FORM_data1
; CHECK-NEXT: DW_IDX_die_offset: DW_FORM_ref4
+; CHECK-NEXT: DW_IDX_parent: DW_FORM_flag_present
; CHECK-NEXT: }
-; CHECK-NEXT: Abbreviation [[ABBREV3:0x[0-9a-f]*]] {
-; CHECK-NEXT: Tag: DW_TAG_structure_type
+; CHECK-NEXT: Abbreviation [[ABBREV4:0x[0-9a-f]*]] {
+; CHECK-NEXT: Tag: DW_TAG_base_type
; CHECK-NEXT: DW_IDX_type_unit: DW_FORM_data1
; CHECK-NEXT: DW_IDX_die_offset: DW_FORM_ref4
+; CHECK-NEXT: DW_IDX_parent: DW_FORM_flag_present
; CHECK-NEXT: }
; CHECK-NEXT: Abbreviation [[ABBREV:0x[0-9a-f]*]] {
; CHECK-NEXT: Tag: DW_TAG_base_type
; CHECK-NEXT: DW_IDX_die_offset: DW_FORM_ref4
+; CHECK-NEXT: DW_IDX_parent: DW_FORM_flag_present
; CHECK-NEXT: }
-; CHECK-NEXT: Abbreviation [[ABBREV2:0x[0-9a-f]*]] {
-; CHECK-NEXT: Tag: DW_TAG_subprogram
+; CHECK-NEXT: Abbreviation [[ABBREV1:0x[0-9a-f]*]] {
+; CHECK-NEXT: Tag: DW_TAG_structure_type
; CHECK-NEXT: DW_IDX_die_offset: DW_FORM_ref4
+; CHECK-NEXT: DW_IDX_parent: DW_FORM_flag_present
; CHECK-NEXT: }
-; CHECK-NEXT: Abbreviation [[ABBREV4:0x[0-9a-f]*]] {
-; CHECK-NEXT: Tag: DW_TAG_base_type
-; CHECK-NEXT: DW_IDX_type_unit: DW_FORM_data1
+; CHECK-NEXT: Abbreviation [[ABBREV2:0x[0-9a-f]*]] {
+; CHECK-NEXT: Tag: DW_TAG_subprogram
; CHECK-NEXT: DW_IDX_die_offset: DW_FORM_ref4
+; CHECK-NEXT: DW_IDX_parent: DW_FORM_flag_present
; CHECK-NEXT: }
; CHECK-NEXT: ]
; CHECK-NEXT: Bucket 0 [
@@ -68,6 +73,7 @@
; CHECK-NEXT: Abbrev: [[ABBREV]]
; CHECK-NEXT: Tag: DW_TAG_base_type
; CHECK-NEXT: DW_IDX_die_offset: 0x0000003e
+; CHECK-NEXT: DW_IDX_parent: true
; CHECK-NEXT: }
; CHECK-NEXT: }
; CHECK-NEXT: ]
@@ -80,11 +86,13 @@
; CHECK-NEXT: Tag: DW_TAG_structure_type
; CHECK-NEXT: DW_IDX_type_unit: 0x00
; CHECK-NEXT: DW_IDX_die_offset: 0x00000023
+; CHECK-NEXT: DW_IDX_parent: true
; CHECK-NEXT: }
-; CHECK-NEXT: Entry @ 0xaa {
+; CHECK-NEXT: Entry @ {{.+}} {
; CHECK-NEXT: Abbrev: [[ABBREV1]]
; CHECK-NEXT: Tag: DW_TAG_structure_type
; CHECK-NEXT: DW_IDX_die_offset: 0x00000042
+; CHECK-NEXT: DW_IDX_parent: true
; CHECK-NEXT: }
; CHECK-NEXT: }
; CHECK-NEXT: ]
@@ -96,6 +104,7 @@
; CHECK-NEXT: Abbrev: [[ABBREV2]]
; CHECK-NEXT: Tag: DW_TAG_subprogram
; CHECK-NEXT: DW_IDX_die_offset: 0x00000023
+; CHECK-NEXT: DW_IDX_parent: true
; CHECK-NEXT: }
; CHECK-NEXT: }
; CHECK-NEXT: ]
@@ -108,6 +117,7 @@
; CHECK-NEXT: Tag: DW_TAG_base_type
; CHECK-NEXT: DW_IDX_type_unit: 0x00
; CHECK-NEXT: DW_IDX_die_offset: 0x00000038
+; CHECK-NEXT: DW_IDX_parent: true
; CHECK-NEXT: }
; CHECK-NEXT: }
; CHECK-NEXT: ]
@@ -120,7 +130,7 @@
; CHECK-SPLIT: Foreign TU count: 1
; CHECK-SPLIT-NEXT: Bucket count: 4
; CHECK-SPLIT-NEXT: Name count: 4
-; CHECK-SPLIT-NEXT: Abbreviations table size: 0x28
+; CHECK-SPLIT-NEXT: Abbreviations table size: 0x32
; CHECK-SPLIT-NEXT: Augmentation: 'LLVM0700'
; CHECK-SPLIT-NEXT: }
; CHECK-SPLIT-NEXT: Compilation Unit offsets [
@@ -130,27 +140,32 @@
; CHECK-SPLIT-NEXT: ForeignTU[0]: 0x675d23e4f33235f2
; CHECK-SPLIT-NEXT: ]
; CHECK-SPLIT-NEXT: Abbreviations [
-; CHECK-SPLIT-NEXT: Abbreviation [[ABBREV:0x[0-9a-f]*]] {
+; CHECK-SPLIT-NEXT: Abbreviation [[ABBREV1:0x[0-9a-f]*]] {
; CHECK-SPLIT-NEXT: Tag: DW_TAG_structure_type
+; CHECK-SPLIT-NEXT: DW_IDX_type_unit: DW_FORM_data1
; CHECK-SPLIT-NEXT: DW_IDX_die_offset: DW_FORM_ref4
+; CHECK-SPLIT-NEXT: DW_IDX_parent: DW_FORM_flag_present
; CHECK-SPLIT-NEXT: }
-; CHECK-SPLIT-NEXT: Abbreviation [[ABBREV1:0x[0-9a-f]*]] {
-; CHECK-SPLIT-NEXT: Tag: DW_TAG_structure_type
+; CHECK-SPLIT-NEXT: Abbreviation [[ABBREV4:0x[0-9a-f]*]] {
+; CHECK-SPLIT-NEXT: Tag: DW_TAG_base_type
; CHECK-SPLIT-NEXT: DW_IDX_type_unit: DW_FORM_data1
; CHECK-SPLIT-NEXT: DW_IDX_die_offset: DW_FORM_ref4
+; CHECK-SPLIT-NEXT: DW_IDX_parent: DW_FORM_flag_present
; CHECK-SPLIT-NEXT: }
; CHECK-SPLIT-NEXT: Abbreviation [[ABBREV2:0x[0-9a-f]*]] {
; CHECK-SPLIT-NEXT: Tag: DW_TAG_base_type
; CHECK-SPLIT-NEXT: DW_IDX_die_offset: DW_FORM_ref4
+; CHECK-SPLIT-NEXT: DW_IDX_parent: DW_FORM_flag_present
; CHECK-SPLIT-NEXT: }
-; CHECK-SPLIT-NEXT: Abbreviation [[ABBREV3:0x[0-9a-f]*]] {
-; CHECK-SPLIT-NEXT: Tag: DW_TAG_subprogram
+; CHECK-SPLIT-NEXT: Abbreviation [[ABBREV:0x[0-9a-f]*]] {
+; CHECK-SPLIT-NEXT: Tag: DW_TAG_structure_type
; CHECK-SPLIT-NEXT: DW_IDX_die_offset: DW_FORM_ref4
+; CHECK-SPLIT-NEXT: DW_IDX_parent: DW_FORM_flag_present
; CHECK-SPLIT-NEXT: }
-; CHECK-SPLIT-NEXT: Abbreviation [[ABBREV4:0x[0-9a-f]*]] {
-; CHECK-SPLIT-NEXT: Tag: DW_TAG_base_type
-; CHECK-SPLIT-NEXT: DW_IDX_type_unit: DW_FORM_data1
+; CHECK-SPLIT-NEXT: Abbreviation [[ABBREV3:0x[0-9a-f]*]] {
+; CHECK-SPLIT-NEXT: Tag: DW_TAG_subprogram
; CHECK-SPLIT-NEXT: DW_IDX_die_offset: DW_FORM_ref4
+; CHECK-SPLIT-NEXT: DW_IDX_parent: DW_FORM_flag_present
; CHECK-SPLIT-NEXT: }
; CHECK-SPLIT-NEXT: ]
; CHECK-SPLIT-NEXT: Bucket 0 [
@@ -161,6 +176,7 @@
; CHECK-SPLIT-NEXT: Abbrev: [[ABBREV2]]
; CHECK-SPLIT-NEXT: Tag: DW_TAG_base_type
; CHECK-SPLIT-NEXT: DW_IDX_die_offset: 0x00000035
+; CHECK-SPLIT-NEXT: DW_IDX_parent: true
; CHECK-SPLIT-NEXT: }
; CHECK-SPLIT-NEXT: }
; CHECK-SPLIT-NEXT: ]
@@ -173,11 +189,13 @@
; CHECK-SPLIT-NEXT: Tag: DW_TAG_structure_type
; CHECK-SPLIT-NEXT: DW_IDX_type_unit: 0x00
; CHECK-SPLIT-NEXT: DW_IDX_die_offset: 0x00000021
+; CHECK-SPLIT-NEXT: DW_IDX_parent: true
; CHECK-SPLIT-NEXT: }
-; CHECK-SPLIT-NEXT: Entry @ 0xae {
+; CHECK-SPLIT-NEXT: Entry @ {{.*}} {
; CHECK-SPLIT-NEXT: Abbrev: [[ABBREV]]
; CHECK-SPLIT-NEXT: Tag: DW_TAG_structure_type
; CHECK-SPLIT-NEXT: DW_IDX_die_offset: 0x00000039
+; CHECK-SPLIT-NEXT: DW_IDX_parent: true
; CHECK-SPLIT-NEXT: }
; CHECK-SPLIT-NEXT: }
; CHECK-SPLIT-NEXT: ]
@@ -189,6 +207,7 @@
; CHECK-SPLIT-NEXT: Abbrev: [[ABBREV3]]
; CHECK-SPLIT-NEXT: Tag: DW_TAG_subprogram
; CHECK-SPLIT-NEXT: DW_IDX_die_offset: 0x0000001a
+; CHECK-SPLIT-NEXT: DW_IDX_parent: true
; CHECK-SPLIT-NEXT: }
; CHECK-SPLIT-NEXT: }
; CHECK-SPLIT-NEXT: ]
@@ -201,6 +220,7 @@
; CHECK-SPLIT-NEXT: Tag: DW_TAG_base_type
; CHECK-SPLIT-NEXT: DW_IDX_type_unit: 0x00
; CHECK-SPLIT-NEXT: DW_IDX_die_offset: 0x00000036
+; CHECK-SPLIT-NEXT: DW_IDX_parent: true
; CHECK-SPLIT-NEXT: }
; CHECK-SPLIT-NEXT: }
; CHECK-SPLIT-NEXT: ]
diff --git a/llvm/test/tools/dsymutil/ARM/accel-imported-declarations.test b/llvm/test/tools/dsymutil/ARM/accel-imported-declarations.test
index 057e89d060b1d2..a8bf191e036f75 100644
--- a/llvm/test/tools/dsymutil/ARM/accel-imported-declarations.test
+++ b/llvm/test/tools/dsymutil/ARM/accel-imported-declarations.test
@@ -23,11 +23,13 @@ DWARF-NEXT: Entry {{.*}} {
DWARF-NEXT: Abbrev: {{.*}}
DWARF-NEXT: Tag: DW_TAG_namespace
DWARF: DW_IDX_die_offset: [[NAMESPACE]]
+DWARF-NEXT: DW_IDX_parent: 0x{{.*}}
DWARF-NEXT: }
DWARF-NEXT: Entry {{.*}} {
DWARF-NEXT: Abbrev: {{.*}}
DWARF: Tag: DW_TAG_imported_declaration
DWARF: DW_IDX_die_offset: 0x0000005c
+DWARF-NEXT: DW_IDX_parent: 0x{{.*}}
DWARF-NEXT: }
DWARF-NEXT: }
diff --git a/llvm/test/tools/dsymutil/ARM/dwarf5-dwarf4-combination-macho.test b/llvm/test/tools/dsymutil/ARM/dwarf5-dwarf4-combination-macho.test
index d5b78bd1487e18..1570ea922e9551 100644
--- a/llvm/test/tools/dsymutil/ARM/dwarf5-dwarf4-combination-macho.test
+++ b/llvm/test/tools/dsymutil/ARM/dwarf5-dwarf4-combination-macho.test
@@ -31,14 +31,14 @@
RUN: rm -rf %t.dir && mkdir -p %t.dir
RUN: dsymutil -y %p/dummy-debug-map-amr64.map -oso-prepend-path=%p/../Inputs/DWARF5-DWARF4-combination -o %t.dir/dwarf5-dwarf4-combination-macho.dSYM
-RUN: llvm-dwarfdump %t.dir/dwarf5-dwarf4-combination-macho.dSYM -a --verbose | FileCheck %s
+RUN: llvm-dwarfdump %t.dir/dwarf5-dwarf4-combination-macho.dSYM -a --verbose | FileCheck %s --check-prefixes=CHECK,WITH-PARENTS
RUN: rm -rf %t.dir && mkdir -p %t.dir
RUN: dsymutil --no-odr --linker llvm -y %p/dummy-debug-map-amr64.map \
RUN: -oso-prepend-path=%p/../Inputs/DWARF5-DWARF4-combination \
RUN: -o %t.dir/dwarf5-dwarf4-combination-macho.dSYM
RUN: llvm-dwarfdump %t.dir/dwarf5-dwarf4-combination-macho.dSYM \
-RUN: -a --verbose | FileCheck %s
+RUN: -a --verbose | FileCheck %s --check-prefixes=CHECK,NO-PARENTS
### Uncomment following when llvm-dwarfdump will dump address ranges
### correctly for severall compile units case.
@@ -219,7 +219,10 @@ CHECK-NEXT: 0x00000028: 000000dc "int"
CHECK: .debug_names contents:
CHECK-NEXT: Name Index @ 0x0 {
CHECK-NEXT: Header {
-CHECK-NEXT: Length: 0xC4
+; FIXME: when the parallel dwarf linker is able to generate DW_IDX_parent,
+; these headers should be the same.
+WITH-PARENTS-NEXT: Length: 0xC8
+NO-PARENTS-NEXT: Length: 0xC4
CHECK-NEXT: Format: DWARF32
CHECK-NEXT: Version: 5
CHECK-NEXT: CU count: 2
@@ -227,6 +230,7 @@ CHECK-NEXT: Local TU count: 0
CHECK-NEXT: Foreign TU count: 0
CHECK-NEXT: Bucket count: 5
CHECK-NEXT: Name count: 5
-CHECK-NEXT: Abbreviations table size: 0x13
+WITH-PARENTS-NEXT: Abbreviations table size: 0x17
+NO-PARENTS-NEXT: Abbreviations table size: 0x13
CHECK-NEXT: Augmentation: 'LLVM0700'
CHECK-NEXT: }
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