[llvm] [GlobalISel] Improve combines for extend operation by taking hint ins… (PR #74125)
Dávid Ferenc Szabó via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 9 04:14:42 PST 2024
https://github.com/dfszabo updated https://github.com/llvm/llvm-project/pull/74125
>From 95028dc59ab102a03e6536f212da4b1c9bef1943 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?D=C3=A1vid=20Ferenc=20Szab=C3=B3?=
<szabodavidferenc at gmail.com>
Date: Tue, 9 Jan 2024 13:08:12 +0100
Subject: [PATCH 1/2] [NFC] Updating the combine-ext.mir test
---
.../AArch64/GlobalISel/combine-ext.mir | 108 +++++++++++-------
1 file changed, 68 insertions(+), 40 deletions(-)
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/combine-ext.mir b/llvm/test/CodeGen/AArch64/GlobalISel/combine-ext.mir
index 1b8ba9f7bec1d3..508768c1cfec16 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/combine-ext.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/combine-ext.mir
@@ -6,8 +6,10 @@ body: |
bb.1:
liveins: $x0
; CHECK-LABEL: name: test_combine_anyext_trunc
- ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
- ; CHECK: $x1 = COPY [[COPY]](s64)
+ ; CHECK: liveins: $x0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
+ ; CHECK-NEXT: $x1 = COPY [[COPY]](s64)
%0:_(s64) = COPY $x0
%1:_(s32) = G_TRUNC %0(s64)
%2:_(s64) = G_ANYEXT %1(s32)
@@ -19,8 +21,10 @@ body: |
bb.1:
liveins: $q0
; CHECK-LABEL: name: test_combine_anyext_trunc_vec
- ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
- ; CHECK: $q0 = COPY [[COPY]](<2 x s64>)
+ ; CHECK: liveins: $q0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $q0
+ ; CHECK-NEXT: $q0 = COPY [[COPY]](<2 x s64>)
%0:_(<2 x s64>) = COPY $q0
%1:_(<2 x s32>) = G_TRUNC %0(<2 x s64>)
%2:_(<2 x s64>) = G_ANYEXT %1(<2 x s32>)
@@ -32,9 +36,11 @@ body: |
bb.1:
liveins: $h0
; CHECK-LABEL: name: test_combine_anyext_anyext
- ; CHECK: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
- ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[COPY]](s16)
- ; CHECK: $x0 = COPY [[ANYEXT]](s64)
+ ; CHECK: liveins: $h0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[COPY]](s16)
+ ; CHECK-NEXT: $x0 = COPY [[ANYEXT]](s64)
%0:_(s16) = COPY $h0
%1:_(s32) = G_ANYEXT %0(s16)
%2:_(s64) = G_ANYEXT %1(s32)
@@ -46,9 +52,11 @@ body: |
bb.1:
liveins: $s0
; CHECK-LABEL: name: test_combine_anyext_anyext_vec
- ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $s0
- ; CHECK: [[ANYEXT:%[0-9]+]]:_(<2 x s64>) = G_ANYEXT [[COPY]](<2 x s16>)
- ; CHECK: $q0 = COPY [[ANYEXT]](<2 x s64>)
+ ; CHECK: liveins: $s0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $s0
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(<2 x s64>) = G_ANYEXT [[COPY]](<2 x s16>)
+ ; CHECK-NEXT: $q0 = COPY [[ANYEXT]](<2 x s64>)
%0:_(<2 x s16>) = COPY $s0
%1:_(<2 x s32>) = G_ANYEXT %0(<2 x s16>)
%2:_(<2 x s64>) = G_ANYEXT %1(<2 x s32>)
@@ -60,9 +68,11 @@ body: |
bb.1:
liveins: $h0
; CHECK-LABEL: name: test_combine_anyext_sext
- ; CHECK: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
- ; CHECK: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[COPY]](s16)
- ; CHECK: $x0 = COPY [[SEXT]](s64)
+ ; CHECK: liveins: $h0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
+ ; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[COPY]](s16)
+ ; CHECK-NEXT: $x0 = COPY [[SEXT]](s64)
%0:_(s16) = COPY $h0
%1:_(s32) = G_SEXT %0(s16)
%2:_(s64) = G_ANYEXT %1(s32)
@@ -74,9 +84,11 @@ body: |
bb.1:
liveins: $s0
; CHECK-LABEL: name: test_combine_anyext_sext_vec
- ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $s0
- ; CHECK: [[SEXT:%[0-9]+]]:_(<2 x s64>) = G_SEXT [[COPY]](<2 x s16>)
- ; CHECK: $q0 = COPY [[SEXT]](<2 x s64>)
+ ; CHECK: liveins: $s0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $s0
+ ; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(<2 x s64>) = G_SEXT [[COPY]](<2 x s16>)
+ ; CHECK-NEXT: $q0 = COPY [[SEXT]](<2 x s64>)
%0:_(<2 x s16>) = COPY $s0
%1:_(<2 x s32>) = G_SEXT %0(<2 x s16>)
%2:_(<2 x s64>) = G_ANYEXT %1(<2 x s32>)
@@ -88,9 +100,11 @@ body: |
bb.1:
liveins: $h0
; CHECK-LABEL: name: test_combine_anyext_zext
- ; CHECK: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
- ; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY]](s16)
- ; CHECK: $x0 = COPY [[ZEXT]](s64)
+ ; CHECK: liveins: $h0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
+ ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY]](s16)
+ ; CHECK-NEXT: $x0 = COPY [[ZEXT]](s64)
%0:_(s16) = COPY $h0
%1:_(s32) = G_ZEXT %0(s16)
%2:_(s64) = G_ANYEXT %1(s32)
@@ -102,9 +116,11 @@ body: |
bb.1:
liveins: $s0
; CHECK-LABEL: name: test_combine_anyext_zext_vec
- ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $s0
- ; CHECK: [[ZEXT:%[0-9]+]]:_(<2 x s64>) = G_ZEXT [[COPY]](<2 x s16>)
- ; CHECK: $q0 = COPY [[ZEXT]](<2 x s64>)
+ ; CHECK: liveins: $s0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $s0
+ ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(<2 x s64>) = G_ZEXT [[COPY]](<2 x s16>)
+ ; CHECK-NEXT: $q0 = COPY [[ZEXT]](<2 x s64>)
%0:_(<2 x s16>) = COPY $s0
%1:_(<2 x s32>) = G_ZEXT %0(<2 x s16>)
%2:_(<2 x s64>) = G_ANYEXT %1(<2 x s32>)
@@ -116,9 +132,11 @@ body: |
bb.1:
liveins: $h0
; CHECK-LABEL: name: test_combine_sext_sext
- ; CHECK: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
- ; CHECK: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[COPY]](s16)
- ; CHECK: $x0 = COPY [[SEXT]](s64)
+ ; CHECK: liveins: $h0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
+ ; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[COPY]](s16)
+ ; CHECK-NEXT: $x0 = COPY [[SEXT]](s64)
%0:_(s16) = COPY $h0
%1:_(s32) = G_SEXT %0(s16)
%2:_(s64) = G_SEXT %1(s32)
@@ -130,9 +148,11 @@ body: |
bb.1:
liveins: $s0
; CHECK-LABEL: name: test_combine_sext_sext_vec
- ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $s0
- ; CHECK: [[SEXT:%[0-9]+]]:_(<2 x s64>) = G_SEXT [[COPY]](<2 x s16>)
- ; CHECK: $q0 = COPY [[SEXT]](<2 x s64>)
+ ; CHECK: liveins: $s0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $s0
+ ; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(<2 x s64>) = G_SEXT [[COPY]](<2 x s16>)
+ ; CHECK-NEXT: $q0 = COPY [[SEXT]](<2 x s64>)
%0:_(<2 x s16>) = COPY $s0
%1:_(<2 x s32>) = G_SEXT %0(<2 x s16>)
%2:_(<2 x s64>) = G_SEXT %1(<2 x s32>)
@@ -144,9 +164,11 @@ body: |
bb.1:
liveins: $h0
; CHECK-LABEL: name: test_combine_sext_zext
- ; CHECK: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
- ; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY]](s16)
- ; CHECK: $x0 = COPY [[ZEXT]](s64)
+ ; CHECK: liveins: $h0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
+ ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY]](s16)
+ ; CHECK-NEXT: $x0 = COPY [[ZEXT]](s64)
%0:_(s16) = COPY $h0
%1:_(s32) = G_ZEXT %0(s16)
%2:_(s64) = G_SEXT %1(s32)
@@ -158,9 +180,11 @@ body: |
bb.1:
liveins: $s0
; CHECK-LABEL: name: test_combine_sext_zext_vec
- ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $s0
- ; CHECK: [[ZEXT:%[0-9]+]]:_(<2 x s64>) = G_ZEXT [[COPY]](<2 x s16>)
- ; CHECK: $q0 = COPY [[ZEXT]](<2 x s64>)
+ ; CHECK: liveins: $s0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $s0
+ ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(<2 x s64>) = G_ZEXT [[COPY]](<2 x s16>)
+ ; CHECK-NEXT: $q0 = COPY [[ZEXT]](<2 x s64>)
%0:_(<2 x s16>) = COPY $s0
%1:_(<2 x s32>) = G_ZEXT %0(<2 x s16>)
%2:_(<2 x s64>) = G_SEXT %1(<2 x s32>)
@@ -172,9 +196,11 @@ body: |
bb.1:
liveins: $h0
; CHECK-LABEL: name: test_combine_zext_zext
- ; CHECK: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
- ; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY]](s16)
- ; CHECK: $x0 = COPY [[ZEXT]](s64)
+ ; CHECK: liveins: $h0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
+ ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY]](s16)
+ ; CHECK-NEXT: $x0 = COPY [[ZEXT]](s64)
%0:_(s16) = COPY $h0
%1:_(s32) = G_ZEXT %0(s16)
%2:_(s64) = G_ZEXT %1(s32)
@@ -186,9 +212,11 @@ body: |
bb.1:
liveins: $s0
; CHECK-LABEL: name: test_combine_zext_zext_vec
- ; CHECK: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $s0
- ; CHECK: [[ZEXT:%[0-9]+]]:_(<2 x s64>) = G_ZEXT [[COPY]](<2 x s16>)
- ; CHECK: $q0 = COPY [[ZEXT]](<2 x s64>)
+ ; CHECK: liveins: $s0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s16>) = COPY $s0
+ ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(<2 x s64>) = G_ZEXT [[COPY]](<2 x s16>)
+ ; CHECK-NEXT: $q0 = COPY [[ZEXT]](<2 x s64>)
%0:_(<2 x s16>) = COPY $s0
%1:_(<2 x s32>) = G_ZEXT %0(<2 x s16>)
%2:_(<2 x s64>) = G_ZEXT %1(<2 x s32>)
>From 1aa46d545e3c12459e4c2ae9e0576305ba17b2dc Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?D=C3=A1vid=20Ferenc=20Szab=C3=B3?=
<szabodavidferenc at gmail.com>
Date: Fri, 1 Dec 2023 16:51:32 +0100
Subject: [PATCH 2/2] [GlobalISel] Improve combines for extend operation by
taking hint instructions into account
Hint instructions like G_ASSERT_ZEXT can be viewed as a copy. Including this fact into the combiner allows to match more patterns involving such instructions.
---
.../lib/CodeGen/GlobalISel/CombinerHelper.cpp | 6 +
.../AArch64/GlobalISel/combine-ext.mir | 118 ++++++++++++++++++
.../irtranslator-hoisted-constants.ll | 5 +-
3 files changed, 125 insertions(+), 4 deletions(-)
diff --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
index c2a7c2d0118812..069752807f3904 100644
--- a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
@@ -2280,6 +2280,9 @@ bool CombinerHelper::matchCombineAnyExtTrunc(MachineInstr &MI, Register &Reg) {
assert(MI.getOpcode() == TargetOpcode::G_ANYEXT && "Expected a G_ANYEXT");
Register DstReg = MI.getOperand(0).getReg();
Register SrcReg = MI.getOperand(1).getReg();
+ Register OriginalSrcReg = getSrcRegIgnoringCopies(SrcReg, MRI);
+ if (OriginalSrcReg.isValid())
+ SrcReg = OriginalSrcReg;
LLT DstTy = MRI.getType(DstReg);
return mi_match(SrcReg, MRI,
m_GTrunc(m_all_of(m_Reg(Reg), m_SpecificType(DstTy))));
@@ -2306,6 +2309,9 @@ bool CombinerHelper::matchCombineExtOfExt(
MI.getOpcode() == TargetOpcode::G_ZEXT) &&
"Expected a G_[ASZ]EXT");
Register SrcReg = MI.getOperand(1).getReg();
+ Register OriginalSrcReg = getSrcRegIgnoringCopies(SrcReg, MRI);
+ if (OriginalSrcReg.isValid())
+ SrcReg = OriginalSrcReg;
MachineInstr *SrcMI = MRI.getVRegDef(SrcReg);
// Match exts with the same opcode, anyext([sz]ext) and sext(zext).
unsigned Opc = MI.getOpcode();
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/combine-ext.mir b/llvm/test/CodeGen/AArch64/GlobalISel/combine-ext.mir
index 508768c1cfec16..a431a6764d06f7 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/combine-ext.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/combine-ext.mir
@@ -16,6 +16,22 @@ body: |
$x1 = COPY %2(s64)
...
---
+name: test_combine_anyext_trunc_with_hint
+body: |
+ bb.1:
+ liveins: $x0
+ ; CHECK-LABEL: name: test_combine_anyext_trunc_with_hint
+ ; CHECK: liveins: $x0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
+ ; CHECK-NEXT: $x1 = COPY [[COPY]](s64)
+ %0:_(s64) = COPY $x0
+ %1:_(s32) = G_TRUNC %0(s64)
+ %2:_(s32) = G_ASSERT_ZEXT %1(s32), 11
+ %3:_(s64) = G_ANYEXT %2(s32)
+ $x1 = COPY %3(s64)
+...
+---
name: test_combine_anyext_trunc_vec
body: |
bb.1:
@@ -47,6 +63,23 @@ body: |
$x0 = COPY %2(s64)
...
---
+name: test_combine_anyext_anyext_with_hint
+body: |
+ bb.1:
+ liveins: $h0
+ ; CHECK-LABEL: name: test_combine_anyext_anyext_with_hint
+ ; CHECK: liveins: $h0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
+ ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[COPY]](s16)
+ ; CHECK-NEXT: $x0 = COPY [[ANYEXT]](s64)
+ %0:_(s16) = COPY $h0
+ %1:_(s32) = G_ANYEXT %0(s16)
+ %2:_(s32) = G_ASSERT_ZEXT %1(s32), 11
+ %3:_(s64) = G_ANYEXT %2(s32)
+ $x0 = COPY %3(s64)
+...
+---
name: test_combine_anyext_anyext_vec
body: |
bb.1:
@@ -79,6 +112,23 @@ body: |
$x0 = COPY %2(s64)
...
---
+name: test_combine_anyext_sext_with_hint
+body: |
+ bb.1:
+ liveins: $h0
+ ; CHECK-LABEL: name: test_combine_anyext_sext_with_hint
+ ; CHECK: liveins: $h0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
+ ; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[COPY]](s16)
+ ; CHECK-NEXT: $x0 = COPY [[SEXT]](s64)
+ %0:_(s16) = COPY $h0
+ %1:_(s32) = G_SEXT %0(s16)
+ %2:_(s32) = G_ASSERT_ZEXT %1(s32), 11
+ %3:_(s64) = G_ANYEXT %2(s32)
+ $x0 = COPY %3(s64)
+...
+---
name: test_combine_anyext_sext_vec
body: |
bb.1:
@@ -111,6 +161,23 @@ body: |
$x0 = COPY %2(s64)
...
---
+name: test_combine_anyext_zext_with_hint
+body: |
+ bb.1:
+ liveins: $h0
+ ; CHECK-LABEL: name: test_combine_anyext_zext_with_hint
+ ; CHECK: liveins: $h0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
+ ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY]](s16)
+ ; CHECK-NEXT: $x0 = COPY [[ZEXT]](s64)
+ %0:_(s16) = COPY $h0
+ %1:_(s32) = G_ZEXT %0(s16)
+ %2:_(s32) = G_ASSERT_ZEXT %1(s32), 11
+ %3:_(s64) = G_ANYEXT %2(s32)
+ $x0 = COPY %3(s64)
+...
+---
name: test_combine_anyext_zext_vec
body: |
bb.1:
@@ -143,6 +210,23 @@ body: |
$x0 = COPY %2(s64)
...
---
+name: test_combine_sext_sext_with_hint
+body: |
+ bb.1:
+ liveins: $h0
+ ; CHECK-LABEL: name: test_combine_sext_sext_with_hint
+ ; CHECK: liveins: $h0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
+ ; CHECK-NEXT: [[SEXT:%[0-9]+]]:_(s64) = G_SEXT [[COPY]](s16)
+ ; CHECK-NEXT: $x0 = COPY [[SEXT]](s64)
+ %0:_(s16) = COPY $h0
+ %1:_(s32) = G_SEXT %0(s16)
+ %2:_(s32) = G_ASSERT_SEXT %1(s32), 11
+ %3:_(s64) = G_SEXT %2(s32)
+ $x0 = COPY %3(s64)
+...
+---
name: test_combine_sext_sext_vec
body: |
bb.1:
@@ -175,6 +259,23 @@ body: |
$x0 = COPY %2(s64)
...
---
+name: test_combine_sext_zext_with_hint
+body: |
+ bb.1:
+ liveins: $h0
+ ; CHECK-LABEL: name: test_combine_sext_zext_with_hint
+ ; CHECK: liveins: $h0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
+ ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY]](s16)
+ ; CHECK-NEXT: $x0 = COPY [[ZEXT]](s64)
+ %0:_(s16) = COPY $h0
+ %1:_(s32) = G_ZEXT %0(s16)
+ %2:_(s32) = G_ASSERT_ZEXT %1(s32), 11
+ %3:_(s64) = G_SEXT %2(s32)
+ $x0 = COPY %3(s64)
+...
+---
name: test_combine_sext_zext_vec
body: |
bb.1:
@@ -207,6 +308,23 @@ body: |
$x0 = COPY %2(s64)
...
---
+name: test_combine_zext_zext_with_hint
+body: |
+ bb.1:
+ liveins: $h0
+ ; CHECK-LABEL: name: test_combine_zext_zext_with_hint
+ ; CHECK: liveins: $h0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $h0
+ ; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[COPY]](s16)
+ ; CHECK-NEXT: $x0 = COPY [[ZEXT]](s64)
+ %0:_(s16) = COPY $h0
+ %1:_(s32) = G_ZEXT %0(s16)
+ %2:_(s32) = G_ASSERT_ZEXT %1(s32), 11
+ %3:_(s64) = G_ZEXT %2(s32)
+ $x0 = COPY %3(s64)
+...
+---
name: test_combine_zext_zext_vec
body: |
bb.1:
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-hoisted-constants.ll b/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-hoisted-constants.ll
index a7d7a1e81617e4..5867326c18aa6c 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-hoisted-constants.ll
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-hoisted-constants.ll
@@ -46,14 +46,11 @@ define i32 @test(i32 %a, i1 %c) {
; PRESELECTION-NEXT: {{ $}}
; PRESELECTION-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0
; PRESELECTION-NEXT: [[COPY1:%[0-9]+]]:gpr(s32) = COPY $w1
- ; PRESELECTION-NEXT: [[TRUNC:%[0-9]+]]:gpr(s8) = G_TRUNC [[COPY1]](s32)
- ; PRESELECTION-NEXT: [[ASSERT_ZEXT:%[0-9]+]]:gpr(s8) = G_ASSERT_ZEXT [[TRUNC]], 1
; PRESELECTION-NEXT: [[C:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 0
; PRESELECTION-NEXT: [[C1:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 100000
; PRESELECTION-NEXT: [[CONSTANT_FOLD_BARRIER:%[0-9]+]]:gpr(s32) = G_CONSTANT_FOLD_BARRIER [[C1]]
- ; PRESELECTION-NEXT: [[ANYEXT:%[0-9]+]]:gpr(s32) = G_ANYEXT [[ASSERT_ZEXT]](s8)
; PRESELECTION-NEXT: [[C2:%[0-9]+]]:gpr(s32) = G_CONSTANT i32 1
- ; PRESELECTION-NEXT: [[AND:%[0-9]+]]:gpr(s32) = G_AND [[ANYEXT]], [[C2]]
+ ; PRESELECTION-NEXT: [[AND:%[0-9]+]]:gpr(s32) = G_AND [[COPY1]], [[C2]]
; PRESELECTION-NEXT: G_BRCOND [[AND]](s32), %bb.3
; PRESELECTION-NEXT: G_BR %bb.2
; PRESELECTION-NEXT: {{ $}}
More information about the llvm-commits
mailing list