[llvm] [AArch64][SME] Enable dynamic shuffle for fixed length types. (PR #72490)

[Sander de Smalen via llvm-commits]

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@@ -26155,11 +26179,12 @@ static SDValue GenerateFixedLengthSVETBL(SDValue Op, SDValue Op1, SDValue Op2,
   // value where it would perform first lane duplication for out of
   // index elements. For i8 elements an out-of-range index could be a valid
   // for 2048-bit vector register size.
-  for (unsigned i = 0; i < IndexLen - ElementsPerVectorReg; ++i)
+  for (unsigned i = 0; i < IndexLen - ElementsPerVectorReg; ++i) {
     TBLMask.push_back(DAG.getConstant((int)MaxOffset, DL, MVT::i64));
+    if (!MinMaxEqual)
+      MaskNormalized.push_back(DAG.getConstant(0, DL, MVT::i64));
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sdesmalen-arm wrote:

Should this not be `1` instead of `0` ?

https://github.com/llvm/llvm-project/pull/72490