[llvm] f3f6677 - [X86] combine-bextr.ll - replace X32 checks with X86. NFC.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 8 09:26:03 PST 2024
Author: Simon Pilgrim
Date: 2024-01-08T17:25:43Z
New Revision: f3f66773117259185b76574de9385e25e3902658
URL: https://github.com/llvm/llvm-project/commit/f3f66773117259185b76574de9385e25e3902658
DIFF: https://github.com/llvm/llvm-project/commit/f3f66773117259185b76574de9385e25e3902658.diff
LOG: [X86] combine-bextr.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Add nounwind to remove cfi noise as well.
Added:
Modified:
llvm/test/CodeGen/X86/combine-bextr.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/combine-bextr.ll b/llvm/test/CodeGen/X86/combine-bextr.ll
index c36723732b5cb0..6eea67cb43ec72 100644
--- a/llvm/test/CodeGen/X86/combine-bextr.ll
+++ b/llvm/test/CodeGen/X86/combine-bextr.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2,+bmi | FileCheck %s --check-prefixes=CHECK,X32
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2,+bmi | FileCheck %s --check-prefixes=CHECK,X86
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2,+bmi | FileCheck %s --check-prefixes=CHECK,X64
declare i32 @llvm.x86.bmi.bextr.32(i32, i32)
-define i32 @bextr_zero_length(i32 %x, i32 %y) {
+define i32 @bextr_zero_length(i32 %x, i32 %y) nounwind {
; CHECK-LABEL: bextr_zero_length:
; CHECK: # %bb.0:
; CHECK-NEXT: xorl %eax, %eax
@@ -14,13 +14,13 @@ define i32 @bextr_zero_length(i32 %x, i32 %y) {
ret i32 %2
}
-define i32 @bextr_big_shift(i32 %x, i32 %y) {
-; X32-LABEL: bextr_big_shift:
-; X32: # %bb.0:
-; X32-NEXT: movl $255, %eax
-; X32-NEXT: orl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: bextrl %eax, {{[0-9]+}}(%esp), %eax
-; X32-NEXT: retl
+define i32 @bextr_big_shift(i32 %x, i32 %y) nounwind {
+; X86-LABEL: bextr_big_shift:
+; X86: # %bb.0:
+; X86-NEXT: movl $255, %eax
+; X86-NEXT: orl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: bextrl %eax, {{[0-9]+}}(%esp), %eax
+; X86-NEXT: retl
;
; X64-LABEL: bextr_big_shift:
; X64: # %bb.0:
@@ -32,22 +32,20 @@ define i32 @bextr_big_shift(i32 %x, i32 %y) {
ret i32 %2
}
-define float @bextr_uitofp(i32 %x, i32 %y) {
-; X32-LABEL: bextr_uitofp:
-; X32: # %bb.0:
-; X32-NEXT: pushl %eax
-; X32-NEXT: .cfi_def_cfa_offset 8
-; X32-NEXT: movl $3855, %eax # imm = 0xF0F
-; X32-NEXT: bextrl %eax, {{[0-9]+}}(%esp), %eax
-; X32-NEXT: movd %eax, %xmm0
-; X32-NEXT: por {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
-; X32-NEXT: subsd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
-; X32-NEXT: cvtsd2ss %xmm0, %xmm0
-; X32-NEXT: movss %xmm0, (%esp)
-; X32-NEXT: flds (%esp)
-; X32-NEXT: popl %eax
-; X32-NEXT: .cfi_def_cfa_offset 4
-; X32-NEXT: retl
+define float @bextr_uitofp(i32 %x, i32 %y) nounwind {
+; X86-LABEL: bextr_uitofp:
+; X86: # %bb.0:
+; X86-NEXT: pushl %eax
+; X86-NEXT: movl $3855, %eax # imm = 0xF0F
+; X86-NEXT: bextrl %eax, {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movd %eax, %xmm0
+; X86-NEXT: por {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
+; X86-NEXT: subsd {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
+; X86-NEXT: cvtsd2ss %xmm0, %xmm0
+; X86-NEXT: movss %xmm0, (%esp)
+; X86-NEXT: flds (%esp)
+; X86-NEXT: popl %eax
+; X86-NEXT: retl
;
; X64-LABEL: bextr_uitofp:
; X64: # %bb.0:
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