[llvm] eb523a4 - [X86] vec_extract - replace X32 checks with X86. NFC.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 8 04:38:32 PST 2024
Author: Simon Pilgrim
Date: 2024-01-08T12:33:47Z
New Revision: eb523a4d272e81c8f7bf48da3923ed502f41c187
URL: https://github.com/llvm/llvm-project/commit/eb523a4d272e81c8f7bf48da3923ed502f41c187
DIFF: https://github.com/llvm/llvm-project/commit/eb523a4d272e81c8f7bf48da3923ed502f41c187.diff
LOG: [X86] vec_extract - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Added:
Modified:
llvm/test/CodeGen/X86/vec_extract-avx.ll
llvm/test/CodeGen/X86/vec_extract-mmx.ll
llvm/test/CodeGen/X86/vec_extract-sse4.ll
llvm/test/CodeGen/X86/vec_extract.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/vec_extract-avx.ll b/llvm/test/CodeGen/X86/vec_extract-avx.ll
index 6ca4e73d2f9803..341a703a21bd5e 100644
--- a/llvm/test/CodeGen/X86/vec_extract-avx.ll
+++ b/llvm/test/CodeGen/X86/vec_extract-avx.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X32
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X86
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
; When extracting multiple consecutive elements from a larger
@@ -9,12 +9,12 @@
; Extracting the low elements only requires using the right kind of store.
define void @low_v8f32_to_v4f32(<8 x float> %v, ptr %ptr) {
-; X32-LABEL: low_v8f32_to_v4f32:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: vmovaps %xmm0, (%eax)
-; X32-NEXT: vzeroupper
-; X32-NEXT: retl
+; X86-LABEL: low_v8f32_to_v4f32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: vmovaps %xmm0, (%eax)
+; X86-NEXT: vzeroupper
+; X86-NEXT: retl
;
; X64-LABEL: low_v8f32_to_v4f32:
; X64: # %bb.0:
@@ -35,12 +35,12 @@ define void @low_v8f32_to_v4f32(<8 x float> %v, ptr %ptr) {
; Extracting the high elements requires just one AVX instruction.
define void @high_v8f32_to_v4f32(<8 x float> %v, ptr %ptr) {
-; X32-LABEL: high_v8f32_to_v4f32:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: vextractf128 $1, %ymm0, (%eax)
-; X32-NEXT: vzeroupper
-; X32-NEXT: retl
+; X86-LABEL: high_v8f32_to_v4f32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: vextractf128 $1, %ymm0, (%eax)
+; X86-NEXT: vzeroupper
+; X86-NEXT: retl
;
; X64-LABEL: high_v8f32_to_v4f32:
; X64: # %bb.0:
@@ -63,12 +63,12 @@ define void @high_v8f32_to_v4f32(<8 x float> %v, ptr %ptr) {
; if we were actually using the vector in this function and
; have AVX2, we should generate vextracti128 (the int version).
define void @high_v8i32_to_v4i32(<8 x i32> %v, ptr %ptr) {
-; X32-LABEL: high_v8i32_to_v4i32:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: vextractf128 $1, %ymm0, (%eax)
-; X32-NEXT: vzeroupper
-; X32-NEXT: retl
+; X86-LABEL: high_v8i32_to_v4i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: vextractf128 $1, %ymm0, (%eax)
+; X86-NEXT: vzeroupper
+; X86-NEXT: retl
;
; X64-LABEL: high_v8i32_to_v4i32:
; X64: # %bb.0:
@@ -89,12 +89,12 @@ define void @high_v8i32_to_v4i32(<8 x i32> %v, ptr %ptr) {
; Make sure that element size doesn't alter the codegen.
define void @high_v4f64_to_v2f64(<4 x double> %v, ptr %ptr) {
-; X32-LABEL: high_v4f64_to_v2f64:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: vextractf128 $1, %ymm0, (%eax)
-; X32-NEXT: vzeroupper
-; X32-NEXT: retl
+; X86-LABEL: high_v4f64_to_v2f64:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: vextractf128 $1, %ymm0, (%eax)
+; X86-NEXT: vzeroupper
+; X86-NEXT: retl
;
; X64-LABEL: high_v4f64_to_v2f64:
; X64: # %bb.0:
@@ -113,16 +113,16 @@ define void @high_v4f64_to_v2f64(<4 x double> %v, ptr %ptr) {
; FIXME - Ideally these should just call VMOVD/VMOVQ/VMOVSS/VMOVSD
define void @legal_vzmovl_2i32_8i32(ptr %in, ptr %out) {
-; X32-LABEL: legal_vzmovl_2i32_8i32:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
-; X32-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; X32-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
-; X32-NEXT: vmovaps %ymm0, (%eax)
-; X32-NEXT: vzeroupper
-; X32-NEXT: retl
+; X86-LABEL: legal_vzmovl_2i32_8i32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; X86-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; X86-NEXT: vmovaps %ymm0, (%eax)
+; X86-NEXT: vzeroupper
+; X86-NEXT: retl
;
; X64-LABEL: legal_vzmovl_2i32_8i32:
; X64: # %bb.0:
@@ -140,14 +140,14 @@ define void @legal_vzmovl_2i32_8i32(ptr %in, ptr %out) {
}
define void @legal_vzmovl_2i64_4i64(ptr %in, ptr %out) {
-; X32-LABEL: legal_vzmovl_2i64_4i64:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
-; X32-NEXT: vmovaps %ymm0, (%eax)
-; X32-NEXT: vzeroupper
-; X32-NEXT: retl
+; X86-LABEL: legal_vzmovl_2i64_4i64:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: vmovaps %ymm0, (%eax)
+; X86-NEXT: vzeroupper
+; X86-NEXT: retl
;
; X64-LABEL: legal_vzmovl_2i64_4i64:
; X64: # %bb.0:
@@ -163,16 +163,16 @@ define void @legal_vzmovl_2i64_4i64(ptr %in, ptr %out) {
}
define void @legal_vzmovl_2f32_8f32(ptr %in, ptr %out) {
-; X32-LABEL: legal_vzmovl_2f32_8f32:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
-; X32-NEXT: vxorps %xmm1, %xmm1, %xmm1
-; X32-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
-; X32-NEXT: vmovaps %ymm0, (%eax)
-; X32-NEXT: vzeroupper
-; X32-NEXT: retl
+; X86-LABEL: legal_vzmovl_2f32_8f32:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: vxorps %xmm1, %xmm1, %xmm1
+; X86-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
+; X86-NEXT: vmovaps %ymm0, (%eax)
+; X86-NEXT: vzeroupper
+; X86-NEXT: retl
;
; X64-LABEL: legal_vzmovl_2f32_8f32:
; X64: # %bb.0:
@@ -190,14 +190,14 @@ define void @legal_vzmovl_2f32_8f32(ptr %in, ptr %out) {
}
define void @legal_vzmovl_2f64_4f64(ptr %in, ptr %out) {
-; X32-LABEL: legal_vzmovl_2f64_4f64:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
-; X32-NEXT: vmovaps %ymm0, (%eax)
-; X32-NEXT: vzeroupper
-; X32-NEXT: retl
+; X86-LABEL: legal_vzmovl_2f64_4f64:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
+; X86-NEXT: vmovaps %ymm0, (%eax)
+; X86-NEXT: vzeroupper
+; X86-NEXT: retl
;
; X64-LABEL: legal_vzmovl_2f64_4f64:
; X64: # %bb.0:
diff --git a/llvm/test/CodeGen/X86/vec_extract-mmx.ll b/llvm/test/CodeGen/X86/vec_extract-mmx.ll
index d9afc6f45931a2..672b4591316ce8 100644
--- a/llvm/test/CodeGen/X86/vec_extract-mmx.ll
+++ b/llvm/test/CodeGen/X86/vec_extract-mmx.ll
@@ -1,15 +1,15 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X32
+; RUN: llc < %s -mtriple=i686-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X86
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X64
define i32 @test0(ptr %v4) nounwind {
-; X32-LABEL: test0:
-; X32: # %bb.0: # %entry
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: pshufw $238, (%eax), %mm0 # mm0 = mem[2,3,2,3]
-; X32-NEXT: movd %mm0, %eax
-; X32-NEXT: addl $32, %eax
-; X32-NEXT: retl
+; X86-LABEL: test0:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: pshufw $238, (%eax), %mm0 # mm0 = mem[2,3,2,3]
+; X86-NEXT: movd %mm0, %eax
+; X86-NEXT: addl $32, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test0:
; X64: # %bb.0: # %entry
@@ -32,14 +32,14 @@ entry:
}
define i32 @test1(ptr nocapture readonly %ptr) nounwind {
-; X32-LABEL: test1:
-; X32: # %bb.0: # %entry
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: movd (%eax), %mm0
-; X32-NEXT: pshufw $232, %mm0, %mm0 # mm0 = mm0[0,2,2,3]
-; X32-NEXT: movd %mm0, %eax
-; X32-NEXT: emms
-; X32-NEXT: retl
+; X86-LABEL: test1:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movd (%eax), %mm0
+; X86-NEXT: pshufw $232, %mm0, %mm0 # mm0 = mm0[0,2,2,3]
+; X86-NEXT: movd %mm0, %eax
+; X86-NEXT: emms
+; X86-NEXT: retl
;
; X64-LABEL: test1:
; X64: # %bb.0: # %entry
@@ -67,13 +67,13 @@ entry:
}
define i32 @test2(ptr nocapture readonly %ptr) nounwind {
-; X32-LABEL: test2:
-; X32: # %bb.0: # %entry
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: pshufw $232, (%eax), %mm0 # mm0 = mem[0,2,2,3]
-; X32-NEXT: movd %mm0, %eax
-; X32-NEXT: emms
-; X32-NEXT: retl
+; X86-LABEL: test2:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: pshufw $232, (%eax), %mm0 # mm0 = mem[0,2,2,3]
+; X86-NEXT: movd %mm0, %eax
+; X86-NEXT: emms
+; X86-NEXT: retl
;
; X64-LABEL: test2:
; X64: # %bb.0: # %entry
@@ -94,10 +94,10 @@ entry:
}
define i32 @test3(x86_mmx %a) nounwind {
-; X32-LABEL: test3:
-; X32: # %bb.0:
-; X32-NEXT: movd %mm0, %eax
-; X32-NEXT: retl
+; X86-LABEL: test3:
+; X86: # %bb.0:
+; X86-NEXT: movd %mm0, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test3:
; X64: # %bb.0:
@@ -110,12 +110,12 @@ define i32 @test3(x86_mmx %a) nounwind {
; Verify we don't muck with extractelts from the upper lane.
define i32 @test4(x86_mmx %a) nounwind {
-; X32-LABEL: test4:
-; X32: # %bb.0:
-; X32-NEXT: movq2dq %mm0, %xmm0
-; X32-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
-; X32-NEXT: movd %xmm0, %eax
-; X32-NEXT: retl
+; X86-LABEL: test4:
+; X86: # %bb.0:
+; X86-NEXT: movq2dq %mm0, %xmm0
+; X86-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
+; X86-NEXT: movd %xmm0, %eax
+; X86-NEXT: retl
;
; X64-LABEL: test4:
; X64: # %bb.0:
diff --git a/llvm/test/CodeGen/X86/vec_extract-sse4.ll b/llvm/test/CodeGen/X86/vec_extract-sse4.ll
index ea444d3a00af63..1f384861b37356 100644
--- a/llvm/test/CodeGen/X86/vec_extract-sse4.ll
+++ b/llvm/test/CodeGen/X86/vec_extract-sse4.ll
@@ -1,15 +1,15 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X32
+; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X86
; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64
define void @t1(ptr %R, ptr %P1) nounwind {
-; X32-LABEL: t1:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
-; X32-NEXT: movss %xmm0, (%eax)
-; X32-NEXT: retl
+; X86-LABEL: t1:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; X86-NEXT: movss %xmm0, (%eax)
+; X86-NEXT: retl
;
; X64-LABEL: t1:
; X64: # %bb.0:
@@ -23,11 +23,11 @@ define void @t1(ptr %R, ptr %P1) nounwind {
}
define float @t2(ptr %P1) nounwind {
-; X32-LABEL: t2:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: flds 8(%eax)
-; X32-NEXT: retl
+; X86-LABEL: t2:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: flds 8(%eax)
+; X86-NEXT: retl
;
; X64-LABEL: t2:
; X64: # %bb.0:
@@ -39,13 +39,13 @@ define float @t2(ptr %P1) nounwind {
}
define void @t3(ptr %R, ptr %P1) nounwind {
-; X32-LABEL: t3:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movl 12(%ecx), %ecx
-; X32-NEXT: movl %ecx, (%eax)
-; X32-NEXT: retl
+; X86-LABEL: t3:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movl 12(%ecx), %ecx
+; X86-NEXT: movl %ecx, (%eax)
+; X86-NEXT: retl
;
; X64-LABEL: t3:
; X64: # %bb.0:
@@ -59,11 +59,11 @@ define void @t3(ptr %R, ptr %P1) nounwind {
}
define i32 @t4(ptr %P1) nounwind {
-; X32-LABEL: t4:
-; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: movl 12(%eax), %eax
-; X32-NEXT: retl
+; X86-LABEL: t4:
+; X86: # %bb.0:
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl 12(%eax), %eax
+; X86-NEXT: retl
;
; X64-LABEL: t4:
; X64: # %bb.0:
diff --git a/llvm/test/CodeGen/X86/vec_extract.ll b/llvm/test/CodeGen/X86/vec_extract.ll
index e753019593d80d..087cd30abee9bc 100644
--- a/llvm/test/CodeGen/X86/vec_extract.ll
+++ b/llvm/test/CodeGen/X86/vec_extract.ll
@@ -1,16 +1,16 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mattr=+sse2,-sse4.1 | FileCheck %s --check-prefix=X32
+; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mattr=+sse2,-sse4.1 | FileCheck %s --check-prefix=X86
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2,-sse4.1 | FileCheck %s --check-prefix=X64
define void @test1(ptr %F, ptr %f) nounwind {
-; X32-LABEL: test1:
-; X32: # %bb.0: # %entry
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
-; X32-NEXT: addss %xmm0, %xmm0
-; X32-NEXT: movss %xmm0, (%eax)
-; X32-NEXT: retl
+; X86-LABEL: test1:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
+; X86-NEXT: addss %xmm0, %xmm0
+; X86-NEXT: movss %xmm0, (%eax)
+; X86-NEXT: retl
;
; X64-LABEL: test1:
; X64: # %bb.0: # %entry
@@ -27,17 +27,17 @@ entry:
}
define float @test2(ptr %F, ptr %f) nounwind {
-; X32-LABEL: test2:
-; X32: # %bb.0: # %entry
-; X32-NEXT: pushl %eax
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: movaps (%eax), %xmm0
-; X32-NEXT: addps %xmm0, %xmm0
-; X32-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
-; X32-NEXT: movss %xmm0, (%esp)
-; X32-NEXT: flds (%esp)
-; X32-NEXT: popl %eax
-; X32-NEXT: retl
+; X86-LABEL: test2:
+; X86: # %bb.0: # %entry
+; X86-NEXT: pushl %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movaps (%eax), %xmm0
+; X86-NEXT: addps %xmm0, %xmm0
+; X86-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
+; X86-NEXT: movss %xmm0, (%esp)
+; X86-NEXT: flds (%esp)
+; X86-NEXT: popl %eax
+; X86-NEXT: retl
;
; X64-LABEL: test2:
; X64: # %bb.0: # %entry
@@ -53,14 +53,14 @@ entry:
}
define void @test3(ptr %R, ptr %P1) nounwind {
-; X32-LABEL: test3:
-; X32: # %bb.0: # %entry
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT: movaps (%ecx), %xmm0
-; X32-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
-; X32-NEXT: movss %xmm0, (%eax)
-; X32-NEXT: retl
+; X86-LABEL: test3:
+; X86: # %bb.0: # %entry
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: movaps (%ecx), %xmm0
+; X86-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,3]
+; X86-NEXT: movss %xmm0, (%eax)
+; X86-NEXT: retl
;
; X64-LABEL: test3:
; X64: # %bb.0: # %entry
@@ -76,16 +76,16 @@ entry:
}
define double @test4(double %A) nounwind {
-; X32-LABEL: test4:
-; X32: # %bb.0: # %entry
-; X32-NEXT: subl $12, %esp
-; X32-NEXT: calll foo at PLT
-; X32-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1,1]
-; X32-NEXT: addsd {{[0-9]+}}(%esp), %xmm0
-; X32-NEXT: movsd %xmm0, (%esp)
-; X32-NEXT: fldl (%esp)
-; X32-NEXT: addl $12, %esp
-; X32-NEXT: retl
+; X86-LABEL: test4:
+; X86: # %bb.0: # %entry
+; X86-NEXT: subl $12, %esp
+; X86-NEXT: calll foo at PLT
+; X86-NEXT: unpckhpd {{.*#+}} xmm0 = xmm0[1,1]
+; X86-NEXT: addsd {{[0-9]+}}(%esp), %xmm0
+; X86-NEXT: movsd %xmm0, (%esp)
+; X86-NEXT: fldl (%esp)
+; X86-NEXT: addl $12, %esp
+; X86-NEXT: retl
;
; X64-LABEL: test4:
; X64: # %bb.0: # %entry
@@ -107,11 +107,11 @@ declare <2 x double> @foo()
; OSS-Fuzz #15662
; https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=15662
define <4 x i32> @ossfuzz15662(ptr %in) {
-; X32-LABEL: ossfuzz15662:
-; X32: # %bb.0:
-; X32-NEXT: xorps %xmm0, %xmm0
-; X32-NEXT: movaps %xmm0, (%eax)
-; X32-NEXT: retl
+; X86-LABEL: ossfuzz15662:
+; X86: # %bb.0:
+; X86-NEXT: xorps %xmm0, %xmm0
+; X86-NEXT: movaps %xmm0, (%eax)
+; X86-NEXT: retl
;
; X64-LABEL: ossfuzz15662:
; X64: # %bb.0:
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