[llvm] [AArch64][GlobalISel] Combine vecreduce(ext) to {U/S}ADDLV (PR #75832)

[David Green via llvm-commits]

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@@ -248,6 +248,7 @@ enum NodeType : unsigned {
 
   // Unsigned sum Long across Vector
   UADDLV,
+  SADDLV,
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davemgreen wrote:

Can you add this to AArch64TargetLowering::getTargetNodeName too

https://github.com/llvm/llvm-project/pull/75832