[llvm] [RISCV] Refactor subreg indices. (PR #77173)
Jessica Clarke via llvm-commits
llvm-commits at lists.llvm.org
Sat Jan 6 16:51:30 PST 2024
jrtc27 wrote:
> > > > I don't think any of these names are an improvement. Why are you of the view Zacas needs this renaming?
> >
> >
> > >
> >
> >
> > > Zacas needs a pair of GPRs. sub_32 is clearly not the right name for the lower half a RV64 GPR pair.
> >
> >
> > But the flip side is SubRegIndex<32> isn't half of a GPR pair for RV64. What you've changed the name to only applies to RV32, whilst it was previously true for RV64 too (even if not so useful).
> > > Should we make SubReg size and offsets HwMode aware?
> >
> >
> > Ideally yes; for CHERI-RISC-V downstream we make the X-in-C subreg be size -1 as a result of not having that.
> > > Or have different regclasses for pairs for RV32 and RV64
> >
> >
> > Would be sad to go down that road...
> > > If we make subregs hwmode aware then we definitely need different indices for GPR and FPR.
> >
> >
> > This is true, but I don't see the point of renaming them until that's possible.
>
> Would setting the size of sub_gpr_even/odd to -1 work?
I believe so, at the possible expense of optimisation opportunities
https://github.com/llvm/llvm-project/pull/77173
More information about the llvm-commits
mailing list