[llvm] [JITLink][AArch32] Add TableGen Backend for Instr Encodings (PR #76996)

[Eymen Ünay via llvm-commits]

================
@@ -212,19 +272,18 @@ template <> struct FixupInfo<Arm_Call> : public FixupInfoArmBranch {
   static constexpr uint32_t BitBlx = 0x10000000;
 };
 
-struct FixupInfoArmMov : public FixupInfoArm {
+template <EdgeKind_aarch32 Kind>
+struct FixupInfoArmMov : public FixupInfoArm<Kind> {
   static constexpr uint32_t OpcodeMask = 0x0ff00000;
   static constexpr uint32_t ImmMask = 0x000f0fff;
   static constexpr uint32_t RegMask = 0x0000f000;
 };
 
-template <> struct FixupInfo<Arm_MovtAbs> : public FixupInfoArmMov {
-  static constexpr uint32_t Opcode = 0x03400000;
-};
+template <>
+struct FixupInfo<Arm_MovtAbs> : public FixupInfoArmMov<Arm_MovtAbs> {};
 
-template <> struct FixupInfo<Arm_MovwAbsNC> : public FixupInfoArmMov {
-  static constexpr uint32_t Opcode = 0x03000000;
-};
+template <>
+struct FixupInfo<Arm_MovwAbsNC> : public FixupInfoArmMov<Arm_MovwAbsNC> {};
 
 template <> struct FixupInfo<Thumb_Jump24> : public FixupInfoThumb {
----------------
eymay wrote:

Thumb Mov's are not modified yet since we can discuss the method of extracting further. Arm Fixup changes provide a baseline of what is possible currently.

https://github.com/llvm/llvm-project/pull/76996