[llvm] [X86] Support 2nd EVEX compression described in X86CompressEVEX.cpp (PR #77202)

[Shengchen Kan via llvm-commits]

https://github.com/KanRobert created https://github.com/llvm/llvm-project/pull/77202

Promoted instruction (EVEX) -> pre-promotion instruction (legacy/VEX)


>From 5e62f4e48b5db4a1ca44c4acb2cb05e4526f8b2a Mon Sep 17 00:00:00 2001
From: Shengchen Kan <shengchen.kan at intel.com>
Date: Sun, 7 Jan 2024 00:09:35 +0800
Subject: [PATCH] [X86] Support 2nd EVEX compression described in
 X86CompressEVEX.cpp

Promoted instruction (EVEX) -> pre-promotion instruction (legacy/VEX)
---
 llvm/utils/TableGen/X86CompressEVEXTablesEmitter.cpp | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/llvm/utils/TableGen/X86CompressEVEXTablesEmitter.cpp b/llvm/utils/TableGen/X86CompressEVEXTablesEmitter.cpp
index b03bcb6bc26b30..c519c07b243c24 100644
--- a/llvm/utils/TableGen/X86CompressEVEXTablesEmitter.cpp
+++ b/llvm/utils/TableGen/X86CompressEVEXTablesEmitter.cpp
@@ -167,12 +167,16 @@ void X86CompressEVEXTablesEmitter::run(raw_ostream &OS) {
   for (const CodeGenInstruction *Inst : PreCompressionInsts) {
     const Record *Rec = Inst->TheDef;
     uint8_t Opcode =
-        byteFromBitsInit(Inst->TheDef->getValueAsBitsInit("Opcode"));
+        byteFromBitsInit(Rec->getValueAsBitsInit("Opcode"));
+    StringRef Name = Rec->getName();
     const CodeGenInstruction *NewInst = nullptr;
-    if (ManualMap.find(Rec->getName()) != ManualMap.end()) {
+    if (ManualMap.find(Name) != ManualMap.end()) {
       Record *NewRec = Records.getDef(ManualMap.at(Rec->getName()));
       assert(NewRec && "Instruction not found!");
       NewInst = &Target.getInstruction(NewRec);
+    } else if (Name.ends_with("_EVEX")) {
+      if (auto *NewRec = Records.getDef(Name.drop_back(5)))
+        NewInst = &Target.getInstruction(NewRec);
     } else {
       // For each pre-compression instruction look for a match in the appropriate
       // vector (instructions with the same opcode) using function object