[llvm] b51130a - [X86] combine-fneg.ll - replace X32 checks with X86. NFC.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 5 05:39:18 PST 2024
Author: Simon Pilgrim
Date: 2024-01-05T13:38:44Z
New Revision: b51130a3311d5553c92408e6e52ea74269fa5a0b
URL: https://github.com/llvm/llvm-project/commit/b51130a3311d5553c92408e6e52ea74269fa5a0b
DIFF: https://github.com/llvm/llvm-project/commit/b51130a3311d5553c92408e6e52ea74269fa5a0b.diff
LOG: [X86] combine-fneg.ll - replace X32 checks with X86. NFC.
We try to use X32 for gnux32 triples only.
Added:
Modified:
llvm/test/CodeGen/X86/combine-fneg.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/combine-fneg.ll b/llvm/test/CodeGen/X86/combine-fneg.ll
index df7dcc0f15280e..e4a07348dc96c5 100644
--- a/llvm/test/CodeGen/X86/combine-fneg.ll
+++ b/llvm/test/CodeGen/X86/combine-fneg.ll
@@ -1,17 +1,17 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse | FileCheck %s --check-prefix=X32-SSE --check-prefix=X32-SSE1
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X32-SSE --check-prefix=X32-SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2 | FileCheck %s --check-prefix=X64-SSE --check-prefix=X64-SSE1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64-SSE --check-prefix=X64-SSE2
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse | FileCheck %s --check-prefixes=X86-SSE,X86-SSE1
+; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86-SSE,X86-SSE2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2 | FileCheck %s --check-prefixes=X64-SSE,X64-SSE1
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X64-SSE,X64-SSE2
; FNEG is defined as subtraction from -0.0.
; This test verifies that we use an xor with a constant to flip the sign bits; no subtraction needed.
define <4 x float> @t1(<4 x float> %Q) nounwind {
-; X32-SSE-LABEL: t1:
-; X32-SSE: # %bb.0:
-; X32-SSE-NEXT: xorps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
-; X32-SSE-NEXT: retl
+; X86-SSE-LABEL: t1:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: xorps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
+; X86-SSE-NEXT: retl
;
; X64-SSE-LABEL: t1:
; X64-SSE: # %bb.0:
@@ -24,10 +24,10 @@ define <4 x float> @t1(<4 x float> %Q) nounwind {
; Possibly misplaced test, but since we're checking undef scenarios...
define float @scalar_fsub_neg0_undef(float %x) nounwind {
-; X32-SSE-LABEL: scalar_fsub_neg0_undef:
-; X32-SSE: # %bb.0:
-; X32-SSE-NEXT: fldz
-; X32-SSE-NEXT: retl
+; X86-SSE-LABEL: scalar_fsub_neg0_undef:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: fldz
+; X86-SSE-NEXT: retl
;
; X64-SSE-LABEL: scalar_fsub_neg0_undef:
; X64-SSE: # %bb.0:
@@ -37,10 +37,10 @@ define float @scalar_fsub_neg0_undef(float %x) nounwind {
}
define float @scalar_fneg_undef(float %x) nounwind {
-; X32-SSE-LABEL: scalar_fneg_undef:
-; X32-SSE: # %bb.0:
-; X32-SSE-NEXT: fldz
-; X32-SSE-NEXT: retl
+; X86-SSE-LABEL: scalar_fneg_undef:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: fldz
+; X86-SSE-NEXT: retl
;
; X64-SSE-LABEL: scalar_fneg_undef:
; X64-SSE: # %bb.0:
@@ -50,9 +50,9 @@ define float @scalar_fneg_undef(float %x) nounwind {
}
define <4 x float> @fsub_neg0_undef(<4 x float> %Q) nounwind {
-; X32-SSE-LABEL: fsub_neg0_undef:
-; X32-SSE: # %bb.0:
-; X32-SSE-NEXT: retl
+; X86-SSE-LABEL: fsub_neg0_undef:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: retl
;
; X64-SSE-LABEL: fsub_neg0_undef:
; X64-SSE: # %bb.0:
@@ -62,9 +62,9 @@ define <4 x float> @fsub_neg0_undef(<4 x float> %Q) nounwind {
}
define <4 x float> @fneg_undef(<4 x float> %Q) nounwind {
-; X32-SSE-LABEL: fneg_undef:
-; X32-SSE: # %bb.0:
-; X32-SSE-NEXT: retl
+; X86-SSE-LABEL: fneg_undef:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: retl
;
; X64-SSE-LABEL: fneg_undef:
; X64-SSE: # %bb.0:
@@ -74,9 +74,9 @@ define <4 x float> @fneg_undef(<4 x float> %Q) nounwind {
}
define <4 x float> @fsub_neg0_undef_elts_undef(<4 x float> %x) {
-; X32-SSE-LABEL: fsub_neg0_undef_elts_undef:
-; X32-SSE: # %bb.0:
-; X32-SSE-NEXT: retl
+; X86-SSE-LABEL: fsub_neg0_undef_elts_undef:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: retl
;
; X64-SSE-LABEL: fsub_neg0_undef_elts_undef:
; X64-SSE: # %bb.0:
@@ -87,12 +87,12 @@ define <4 x float> @fsub_neg0_undef_elts_undef(<4 x float> %x) {
; This test verifies that we generate an FP subtraction because "0.0 - x" is not an fneg.
define <4 x float> @t2(<4 x float> %Q) nounwind {
-; X32-SSE-LABEL: t2:
-; X32-SSE: # %bb.0:
-; X32-SSE-NEXT: xorps %xmm1, %xmm1
-; X32-SSE-NEXT: subps %xmm0, %xmm1
-; X32-SSE-NEXT: movaps %xmm1, %xmm0
-; X32-SSE-NEXT: retl
+; X86-SSE-LABEL: t2:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: xorps %xmm1, %xmm1
+; X86-SSE-NEXT: subps %xmm0, %xmm1
+; X86-SSE-NEXT: movaps %xmm1, %xmm0
+; X86-SSE-NEXT: retl
;
; X64-SSE-LABEL: t2:
; X64-SSE: # %bb.0:
@@ -116,33 +116,33 @@ define <4 x float> @t2(<4 x float> %Q) nounwind {
; movd (move to xmm return register)
define <2 x float> @fneg_bitcast(i64 %i) nounwind {
-; X32-SSE1-LABEL: fneg_bitcast:
-; X32-SSE1: # %bb.0:
-; X32-SSE1-NEXT: pushl %ebp
-; X32-SSE1-NEXT: movl %esp, %ebp
-; X32-SSE1-NEXT: andl $-16, %esp
-; X32-SSE1-NEXT: subl $16, %esp
-; X32-SSE1-NEXT: movl $-2147483648, %eax # imm = 0x80000000
-; X32-SSE1-NEXT: movl 12(%ebp), %ecx
-; X32-SSE1-NEXT: xorl %eax, %ecx
-; X32-SSE1-NEXT: movl %ecx, {{[0-9]+}}(%esp)
-; X32-SSE1-NEXT: xorl 8(%ebp), %eax
-; X32-SSE1-NEXT: movl %eax, (%esp)
-; X32-SSE1-NEXT: movaps (%esp), %xmm0
-; X32-SSE1-NEXT: movl %ebp, %esp
-; X32-SSE1-NEXT: popl %ebp
-; X32-SSE1-NEXT: retl
+; X86-SSE1-LABEL: fneg_bitcast:
+; X86-SSE1: # %bb.0:
+; X86-SSE1-NEXT: pushl %ebp
+; X86-SSE1-NEXT: movl %esp, %ebp
+; X86-SSE1-NEXT: andl $-16, %esp
+; X86-SSE1-NEXT: subl $16, %esp
+; X86-SSE1-NEXT: movl $-2147483648, %eax # imm = 0x80000000
+; X86-SSE1-NEXT: movl 12(%ebp), %ecx
+; X86-SSE1-NEXT: xorl %eax, %ecx
+; X86-SSE1-NEXT: movl %ecx, {{[0-9]+}}(%esp)
+; X86-SSE1-NEXT: xorl 8(%ebp), %eax
+; X86-SSE1-NEXT: movl %eax, (%esp)
+; X86-SSE1-NEXT: movaps (%esp), %xmm0
+; X86-SSE1-NEXT: movl %ebp, %esp
+; X86-SSE1-NEXT: popl %ebp
+; X86-SSE1-NEXT: retl
;
-; X32-SSE2-LABEL: fneg_bitcast:
-; X32-SSE2: # %bb.0:
-; X32-SSE2-NEXT: movl $-2147483648, %eax # imm = 0x80000000
-; X32-SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X32-SSE2-NEXT: xorl %eax, %ecx
-; X32-SSE2-NEXT: movd %ecx, %xmm1
-; X32-SSE2-NEXT: xorl {{[0-9]+}}(%esp), %eax
-; X32-SSE2-NEXT: movd %eax, %xmm0
-; X32-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
-; X32-SSE2-NEXT: retl
+; X86-SSE2-LABEL: fneg_bitcast:
+; X86-SSE2: # %bb.0:
+; X86-SSE2-NEXT: movl $-2147483648, %eax # imm = 0x80000000
+; X86-SSE2-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X86-SSE2-NEXT: xorl %eax, %ecx
+; X86-SSE2-NEXT: movd %ecx, %xmm1
+; X86-SSE2-NEXT: xorl {{[0-9]+}}(%esp), %eax
+; X86-SSE2-NEXT: movd %eax, %xmm0
+; X86-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
+; X86-SSE2-NEXT: retl
;
; X64-SSE1-LABEL: fneg_bitcast:
; X64-SSE1: # %bb.0:
@@ -164,10 +164,10 @@ define <2 x float> @fneg_bitcast(i64 %i) nounwind {
}
define <4 x float> @fneg_undef_elts_v4f32(<4 x float> %x) {
-; X32-SSE-LABEL: fneg_undef_elts_v4f32:
-; X32-SSE: # %bb.0:
-; X32-SSE-NEXT: xorps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
-; X32-SSE-NEXT: retl
+; X86-SSE-LABEL: fneg_undef_elts_v4f32:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: xorps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
+; X86-SSE-NEXT: retl
;
; X64-SSE-LABEL: fneg_undef_elts_v4f32:
; X64-SSE: # %bb.0:
@@ -180,9 +180,9 @@ define <4 x float> @fneg_undef_elts_v4f32(<4 x float> %x) {
; This isn't fneg, but similarly check that (X - 0.0) is simplified.
define <4 x float> @fsub0_undef_elts_v4f32(<4 x float> %x) {
-; X32-SSE-LABEL: fsub0_undef_elts_v4f32:
-; X32-SSE: # %bb.0:
-; X32-SSE-NEXT: retl
+; X86-SSE-LABEL: fsub0_undef_elts_v4f32:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: retl
;
; X64-SSE-LABEL: fsub0_undef_elts_v4f32:
; X64-SSE: # %bb.0:
@@ -192,10 +192,10 @@ define <4 x float> @fsub0_undef_elts_v4f32(<4 x float> %x) {
}
define <4 x float> @fneg(<4 x float> %Q) nounwind {
-; X32-SSE-LABEL: fneg:
-; X32-SSE: # %bb.0:
-; X32-SSE-NEXT: xorps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
-; X32-SSE-NEXT: retl
+; X86-SSE-LABEL: fneg:
+; X86-SSE: # %bb.0:
+; X86-SSE-NEXT: xorps {{\.?LCPI[0-9]+_[0-9]+}}, %xmm0
+; X86-SSE-NEXT: retl
;
; X64-SSE-LABEL: fneg:
; X64-SSE: # %bb.0:
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